Simulation and analysis of inductive impact on VLSI interconnects in the presence of process variations. - Xiaoning Qi; Sam C. Lo; Yansheng Luo; Alex Gyure; Mahmoud Shahram; Kishore Singhal (CICC, 2005)

Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance in nanometer technologies. - Xiaoning Qi; Alex Gyure; Yansheng Luo; Sam C. Lo; Mahmoud Shahram; Kishore Singhal (ACM Great Lakes Symposium on VLSI, 2006)

A Statistical Method for Fast and Accurate Capacitance Extraction in the Presence of Floating Dummy Fills. - Shabbir H. Batterywala; Rohit Ananthakrishna; Yansheng Luo; Alex Gyure (VLSI Design, 2006)

A New Simulation Method for NBTI Analysis in SPICE Environment. - Rakesh Vattikonda; Yansheng Luo; Alex Gyure; Xiaoning Qi; Sam C. Lo; Mahmoud Shahram; Yu Cao 001; Kishore Singhal; Dino Toffolon (ISQED, 2007)