Formal Verification of Bypassed Processor Pipelines. - Yanyan Gao 001; Xi Li 003 (ICYCS, 2008)

Formal Verification of Out-of-Order Processor. - Yanyan Gao 001; Xi Li 003 (ICCMS, 2009)

Schedulability Analysis for MultiCore Global Scheduling with Model Checking. - Wei Sheng; Yanyan Gao 001; Li Xi; Xuehai Zhou (MTV, 2010)

An effective model extraction method with state space compression for model checking SystemC TLM designs. - Yanyan Gao 001; Xi Li 003 (ICSAMOS, 2013)

A Semantics-based Translation Method for Automated Verification of SystemC TLM Designs. - Yanyan Gao 001; Xi Li 003 (J. Electron. Test., 2013)

Fast and Lightweight Human Pose Estimation. - Haopan Ren; Wenming Wang; Kaixiang Zhang 003; Dejian Wei; Yanyan Gao 001; Yue Sun (IEEE Access, 2021)

UULPN: An ultra-lightweight network for human pose estimation based on unbiased data processing. - Wenming Wang; Kaixiang Zhang 003; Haopan Ren; Dejian Wei; Yanyan Gao 001; Juncheng Liu (Neurocomputing, 2022)

EDite-HRNet: Enhanced Dynamic Lightweight High-Resolution Network for Human Pose Estimation. - Liyuheng Rui; Yanyan Gao 001; Haopan Ren (IEEE Access, 2023)