An 8b 1GS/s SAR ADC with Metastability-Based Resolution/Speed Enhancement and Self-Tuning Delay Achieving 47.2dB SNDR at Nyquist Input. - Jie Li; Linxiao Shen; Siyuan Ye; Jihang Gao; Jiajia Cui; Xinhang Xu; Zhuoyi Chen; Yaohui Luan; Yuanxin Bao; Ru Huang 001; Le Ye (CICC, 2024)

9.4 A 182.3dB FoMs 50MS/s Pipelined-SAR ADC using Cascode Capacitively Degenerated Dynamic Amplifier and MSB Pre-Conversion Technique. - Zhuoyi Chen; Linxiao Shen; Siyuan Ye; Jihang Gao; Jie Li; Jiajia Cui; Xinhang Xu; Yaohui Luan; Hao Zhang 119; Le Ye; Ru Huang 001 (ISSCC, 2024)

3.10 A 0.69/0.58-PEF 1.6nW/24nW Capacitively Coupled Chopper Instrumentation Amplifier with an Input-Boosted First Stage in 22nm/180nm CMOS. - Xinhang Xu; Siyuan Ye; Yaohui Luan; Jihang Gao; Jie Li; Jiajia Cui; Hao Zhang 119; Ru Huang 001; Linxiao Shen; Le Ye (ISSCC, 2024)

A 110µW 99.5dB-SNDR 20kHz-BW Intrinsically Linear CTDSM with Hybrid Gm-Boosting OTA and Tri-Level FIR DACs. - Xinhang Xu; Yaohui Luan; Jie Li; Jihang Gao; Kwok Cheong Li; Jiajia Cui; Ru Huang 001; Linxiao Shen (CICC, 2025)

An Easy-Drive 16MS/s Pipelined-SAR ADC Using Split Coarse-Fine Input-Buffer-Sampling Scheme and Fast Robust Background Inter-Stage Gain Calibration. - Zhuoyi Chen; Siyuan Ye; Jihang Gao; Jie Li; Jiajia Cui; Xinhang Xu; Yaohui Luan; Ru Huang 001; Linxiao Shen (ISSCC, 2025)

18.3: A 93.3dB SNDR, 180.4dB FoMs Calibration-Free Noise-Shaping Pipelined-SAR ADC with Cross-Stage Gain-Mismatch-Error-Shaping Technique and Negative-R-Assisted Residue Integrator. - Jihang Gao; Yaohui Luan; Siyuan Ye; Xinhang Xu; Zhuoyi Chen; Jiajia Cui; Ru Huang 001; Linxiao Shen (ISSCC, 2025)

18.2 A 12.2μW 99.6dB-SNDR 184.8dB-FOMs DT Zoom PPD ΔΣM with Gain-Embedded Bootstrapped Sampler. - Yaohui Luan; Xinhang Xu; Jihang Gao; Jiajia Cui; Zhuoyi Chen; Siyuan Ye; Ru Huang 001; Linxiao Shen (ISSCC, 2025)

An Energy-Efficient, High-Resolution kT/C-Noise- Canceled Pipelined-SAR Capacitance-to-Digital Converter With Incomplete-Settling-Based Correlated Level Shifting in 22-nm CMOS. - Jihang Gao; Siyuan Ye; Jie Li; Xinhang Xu; Zhuoyi Chen; Jiajia Cui; Yaohui Luan; Ru Huang 001; Le Ye; Linxiao Shen (IEEE J. Solid State Circuits, 2025)

A 2-mW 70.7-dB SNDR 200-MS/s Pipelined-SAR ADC Using Continuous-Time SAR-Assisted Detect-and-Skip and Open-Then-Close Correlated Level Shifting. - Siyuan Ye; Jihang Gao; Jie Li; Zhuoyi Chen; Xinhang Xu; Jiajia Cui; Yaohui Luan; Le Ye; Xing Zhang 002; Ru Huang 001; Linxiao Shen (IEEE J. Solid State Circuits, 2025)