An FPGA Implementation of a Timing-Error Tolerant Discrete Cosine Transform (Abstract Only). - Yaoqiang Li; Pierce I-Jen Chuang; Andrew A. Kennings; Manoj Sachdev (FPGA, 2015)

Voltage-Boosted Synchronizers. - Yaoqiang Li; Pierce I-Jen Chuang; Andrew A. Kennings; Manoj Sachdev (ACM Great Lakes Symposium on VLSI, 2015)

Runtime slack-deficit detection for a low-voltage DCT circuit. - Yaoqiang Li; Pierce I-Jen Chuang; Andrew A. Kennings; Manoj Sachdev (MWSCAS, 2015)