Functional Verification Methodology for Microprocessors Using the Genesys Test-Program Generator-Application to the x86 Microprocessors Family. - Laurent Fournier; Yaron Arbetman; Moshe Levinger (DATE, 1999)

An effective and flexible approach to functional verification of processor families. - David Malandain; Pim Palmen; Matthew Taylor; Merav Aharoni; Yaron Arbetman (HLDVT, 2002)

VLIW: a case study of parallelism verification. - Allon Adir; Yaron Arbetman; Bella Dubrov; Yossi Lichtenstein; Michal Rimon; Michael Vinov; Massimo A. Calligaro; Andrew Cofler; Gabriel Duffy (DAC, 2005)