A wide range all-digital delay locked loop for video applications. - Muhammad Touqir Pasha; Yasir Ali Shah; J. Jacob Wikner (ECCTD, 2015)

K-means based multiple objects tracking with long-term occlusion handling. - Muhammad Imran Shehzad 001; Yasir Ali Shah; Zahid Mehmood; Abdul Waheed Malik; Shoaib Azmat (IET Comput. Vis., 2017)

CAMONET: Moth-Flame Optimization (MFO) Based Clustering Algorithm for VANETs. - Yasir Ali Shah; Hafiz Adnan Habib; Farhan Aadil; Muhammad Fahad Khan; Muazzam Maqsood; Tabassam Nawaz (IEEE Access, 2018)

A high-speed RSD-based flexible ECC processor for arbitrary curves over general prime field. - Yasir Ali Shah; Khalid Javeed; Shoaib Azmat; Xiaojun Wang 001 (Int. J. Circuit Theory Appl., 2018)

High-speed FPGA implementation of full-word Montgomery multiplier for ECC applications. - Safiullah Khan; Khalid Javeed; Yasir Ali Shah (Microprocess. Microsystems, 2018)

Design and Optimization of Complementary Field Excited Linear Flux Switching Machine With Unequal Primary Tooth Width and Segmented Secondary. - Noman Ullah; Abdul Basit 009; Faisal Khan 002; Yasir Ali Shah; Amir Khan; Osama Waheed; Ali Usman (IEEE Access, 2019)

Redundant-Signed-Digit-Based High Speed Elliptic Curve Cryptographic Processor. - Yasir Ali Shah; Khalid Javeed; Shoaib Azmat; Xiaojun Wang 001 (J. Circuits Syst. Comput., 2019)

LUT-based high-speed point multiplier for Goldilocks-Curve448. - Yasir Ali Shah; Khalid Javeed; Muhammad Imran Shehzad 001; Shoaib Azmat (IET Comput. Digit. Tech., 2020)

VLCC-Q: Very low computational complexity optical interconnect architecture with queueing for reducing delay and back pressure probability in data center networks. - Mohsin Fayyaz; Yasir Ali Shah; Fayyaz Ahmed; Ghulam Mujtaba 002 (Concurr. Comput. Pract. Exp., 2022)

Efficient, Error-Resistant NTT Architectures for CRYSTALS-Kyber FPGA Accelerators. - Safiullah Khan; Ayesha Khalid; Ciara Rafferty; Yasir Ali Shah; Máire O'Neill; Wai-Kong Lee; Seong Oun Hwang (VLSI-SoC, 2023)

Efficient Soft Core Multiplier for Post Quantum Digital Signatures. - Yasir Ali Shah; Ciara Rafferty; Ayesha Khalid; Safiullah Khan; Khalid Javeed; Máire O'Neill (ISCAS, 2024)

GMC-crypto: Low latency implementation of ECC point multiplication for generic Montgomery curves over GF(p). - Khalid Javeed; Yasir Ali Shah; David Gregg (J. Parallel Distributed Comput., 2024)

Evaluating NTT/INTT Implementation Styles for Post-Quantum Cryptography. - Malik Imran; Safiullah Khan; Ayesha Khalid; Ciara Rafferty; Yasir Ali Shah; Samuel Pagliarini; Muhammad Rashid 001; Máire O'Neill (IEEE Embed. Syst. Lett., 2024)

Securing the IoT ecosystem: ASIC-based hardware realization of Ascon lightweight cipher. - Safiullah Khan; Kashif Inayat; Fahad Bin Muslim; Yasir Ali Shah; Muhammad Atif Ur Rehman; Ayesha Khalid; Malik Imran; Akmalbek Abdusalomov (Int. J. Inf. Sec., 2024)