Formal Specification of Delta MINs for MPSOC in the ACL2 Logic. - Maissa Elleuch; Yassine Aydi; Mohamed Abid (FDL, 2008)

A multi level functional verification of multistage interconnection network for MPSOC. - Yassine Aydi; Ramzi Tligue; Maissa Elleuch; Mohamed Abid; Jean-Luc Dekeyser (ICECS, 2009)

Scalable mpNoC for massively parallel systems - Design and implementation on FPGA. - Mouna Baklouti; Yassine Aydi; Philippe Marquet; Jean-Luc Dekeyser; Mohamed Abid (J. Syst. Archit., 2010)

A multi-level design methodology of multistage interconnection network for MPSOCs. - Yassine Aydi; Mouna Baklouti; Mohamed Abid; Jean-Luc Dekeyser (Int. J. Comput. Appl. Technol., 2011)

Exploring Hybrid NoC Architecture for Chip Multiprocessor. - Sirine Mnejja; Yassine Aydi; Mohamed Abid (ICM, 2018)

Implementing On-Chip Wireless Communication in Multi-stage Interconnection NoCs. - Sirine Mnejja; Yassine Aydi; Mohamed Abid; Salvatore Monteleone; Maurizio Palesi; Davide Patti (AINA, 2020)

Design of Virtual Reality Based Game for Dual Enhancement of City Monuments and Brand Image. - Yassine Aydi; Meriam Elleuch (Int. J. Serious Games, 2024)