A solution-tracing circuit for the fixed-point homotopy method. - Yasuaki Inoue; Eigo Kaji; Sarko Kasanobu (ISCAS (3), 2001)

An efficient algorithm for finding multiple DC solutions based on Spice oriented Newton homotopy method. - Akio Ushida; Yoshihiro Yamagami; Ikkei Kinouchi; Yoshifumi Nishio; Yasuaki Inoue (ISCAS (5), 2001)

A Practical Approach for the Fixed-Point Homotopy Method Using a Solution-Tracing Circuit. - Yasuaki Inoue; Saeko Kusanobu; Kiyotaka Yamamura (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

An efficient algorithm for finding multiple DC solutions based onthe SPICE-oriented Newton homotopy method. - Akio Ushida; Yoshihiro Yamagami; Yoshifumi Nishio; Ikkei Kinouchi; Yasuaki Inoue (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

An effective initial solution algorithm for globally convergent homotopy methods. - Yasuaki Inoue; Saeko Kusanobu; Kiyotaka Yamamura; M. Ando (ISCAS (3), 2003)

An interval algorithm for finding all solutions of nonlinear resistive circuits. - Kiyotaka Yamamura; Naoya Igarashi; Yasuaki Inoue (ISCAS (3), 2003)

Theorems on the Unique Initial Solution for Globally Convergent Homotopy Methods. - Yasuaki Inoue; Saeko Kusanobu (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

Efficient capacitance extraction method for interconnects with dummy fills. - Atsushi Kurokawa; Toshiki Kanamoto; Akira Kasebe; Yasuaki Inoue; Hiroo Masuda (CICC, 2004)

Effective capacitance for gate delay with RC loads. - Zhangcai Huang; Atsushi Kurokawa; Yasuaki Inoue (ISCAS (3), 2005)

Path following circuits - SPICE-oriented numerical methods where formulas are described by circuits $. - Kiyotaka Yamamura; Wataru Kuroki; Yasuaki Inoue (ISCAS (4), 2005)

High-performance systolic arrays for band matrix multiplication. - Yun Yang; Wenqing Zhao; Yasuaki Inoue (ISCAS (2), 2005)

Dummy Filling Methods for Reducing Interconnect Capacitance and Number of Fills. - Atsushi Kurokawa; Toshiki Kanamoto; Tetsuya Ibe; Akira Kasebe; Wei Fong Chang; Tetsuro Kage; Yasuaki Inoue; Hiroo Masuda (ISQED, 2005)

Capacitance and Yield Evaluations Using a 90-nm Process Technology Based on the Dense Power-Ground Interconnect Architecture. - Atsushi Kurokawa; Masaharu Yamamoto; Nobuto Ono; Tetsuro Kage; Yasuaki Inoue; Hiroo Masuda (ISQED, 2005)

A Novel Model for Computing the Effective Capacitance of CMOS Gates with Interconnect Loads. - Zhangcai Huang; Atsushi Kurokawa; Yasuaki Inoue; Junfa Mao (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

Modeling the Effective Capacitance of Interconnect Loads for Predicting CMOS Gate Slew. - Zhangcai Huang; Atsushi Kurokawa; Jun Pan; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

An Efficient Homotopy Method for Finding DC Operating Points of Nonlinear Circuits. - Yu Imai; Kiyotaka Yamamura; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

A Homotopy Method Using a Nonlinear Auxiliary Function for Solving Transistor Circuits. - Yasuaki Inoue; Yu Imai; Kiyotaka Yamamura (IEICE Trans. Inf. Syst., 2005)

Second-Order Polynomial Expressions for On-Chip Interconnect Capacitance. - Atsushi Kurokawa; Masanori Hashimoto; Akira Kasebe; Zhangcai Huang; Yun Yang; Yasuaki Inoue; Ryosuke Inagaki; Hiroo Masuda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

Efficient Dummy Filling Methods to Reduce Interconnect Capacitance and Number of Dummy Metal Fills. - Atsushi Kurokawa; Toshiki Kanamoto; Tetsuya Ibe; Akira Kasebe; Wei Fong Chang; Tetsuro Kage; Yasuaki Inoue; Hiroo Masuda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

A Practical Approach for Efficiently Extracting Interconnect Capacitances with Floating Dummy Fills. - Atsushi Kurokawa; Toshiki Kanamoto; Akira Kasebe; Yasuaki Inoue; Hiroo Masuda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

Path Following Circuits - SPICE-Oriented Numerical Methods Where Formulas are Described by Circuits - . - Kiyotaka Yamamura; Wataru Kuroki; Hideaki Okuma; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

Efficient Large Scale Integration Power/Ground Network Optimization Based on Grid Genetic Algorithm. - Yun Yang; Atsushi Kurokawa; Yasuaki Inoue; Wenqing Zhao (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

A Wide Dynamic Range Four-Quadrant CMOS Analog Multiplier Using Active Feedback. - Zhangcai Huang; Yasuaki Inoue; Hong Yu 013; Quan Zhang (APCCAS, 2006)

Behavioral macromodeling of analog LSI implementation for automobile intake system. - Zhangcai Huang; Yasuaki Inoue; Quan Zhang; Yuehu Zhou; Long Xie; Harutoshi Ogai (ISCAS, 2006)

An effective pseudo-transient algorithm for finding DC operating points of nonlinear circuits. - Hong Yu 013; Yasuaki Inoue; Yuki Matsuya; Zhangcai Huang (ISCAS, 2006)

Modeling the Influence of Input-to-Output Coupling Capacitance on CMOS Inverter Delay. - Zhangcai Huang; Atsushi Kurokawa; Yun Yang; Hong Yu 013; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

Formula-Based Method for Capacitance Extraction of Interconnects with Dummy Fills. - Atsushi Kurokawa; Akira Kasebe; Toshiki Kanamoto; Yun Yang; Zhangcai Huang; Yasuaki Inoue; Hiroo Masuda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

Determination of Interconnect Structural Parameters for Best- and Worst-Case Delays. - Atsushi Kurokawa; Hiroo Masuda; Junko Fujii; Toshinori Inoshita; Akira Kasebe; Zhangcai Huang; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

A 15-bit 10-Msample/s Pipelined A/D Converter Based on Incomplete Settling Principle. - Shuaiqi Wang; Fule Li; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

An Effective Pseudo-Transient Algorithm for Finding Dc Solutions of Nonlinear Circuits. - Hong Yu 013; Yasuaki Inoue; Yuki Matsuya; Zhangcai Huang (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

Modeling the Overshooting Effect for CMOS Inverter in Nanometer Technologies. - Zhangcai Huang; Hong Yu 013; Atsushi Kurokawa; Yasuaki Inoue (ASP-DAC, 2007)

Behavioral Circuit Macromodeling and Analog LSI Implementation for Automobile Engine Intake System. - Zhangcai Huang; Yasuaki Inoue; Hong Yu 013; Jun Pan; Yun Yang; Quan Zhang; Shuai Fang (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

An Energy Management Circuit for Self-Powered Ubiquitous Sensor Modules Using Vibration-Based Energy. - Jun Pan; Yasuaki Inoue; Zheng Liang (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

A Low-Power Sub-1-V Low-Voltage Reference Using Body Effect. - Jun Pan; Yasuaki Inoue; Zheng Liang; Zhangcai Huang; Weilun Huang (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

An Effective SPICE3 Implementation of the Compound Element Pseudo-Transient Algorithm. - Hong Yu 013; Yasuaki Inoue; Kazutoshi Sako; Xiaochuan Hu; Zhangcai Huang (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

A Novel Expression of Spatial Correlation by a Random Curved Surface Model and Its Application to LSI Design. - Shin-ichi Ohkawa; Hiroo Masuda; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008)

A 12-bit 3.7-Msample/s Pipelined A/D Converter Based on the Novel Capacitor Mismatch Calibration Technique. - Shuaiqi Wang; Fule Li; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008)

A Highly Linear and Wide Input Range Four-Quadrant CMOS Analog Multiplier Using Active Feedback. - Zhangcai Huang; Minglu Jiang; Yasuaki Inoue (IEICE Trans. Electron., 2009)

A PN Junction-Current Model for Advanced MOSFET Technologies. - Ryosuke Inagaki; Norio Sadachika; Mitiko Miura-Mattausch; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Accurate Method for Calculating the Effective Capacitance with RC Loads Based on the Thevenin Model. - Minglu Jiang; Zhangcai Huang; Atsushi Kurokawa; Shuai Fang; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

A GIDL-Current Model for Advanced MOSFET Technologies without Binning. - Ryosuke Inagaki; Norio Sadachika; Dondee Navarro; Mitiko Miura-Mattausch; Yasuaki Inoue (IPSJ Trans. Syst. LSI Des. Methodol., 2009)

A CMOS Sub-l-V nanopower current and voltage reference with leakage compensation. - Zhangcai Huang; Qin Luo; Yasuaki Inoue (ISCAS, 2010)

A low voltage CMOS rectifier for wirelessly powered devices. - Qiang Li; Renyuan Zhang; Zhangcai Huang; Yasuaki Inoue (ISCAS, 2010)

Modeling the Overshooting Effect for CMOS Inverter Delay Analysis in Nanometer Technologies. - Zhangcai Huang; Atsushi Kurokawa; Masanori Hashimoto; Takashi Sato 001; Minglu Jiang; Yasuaki Inoue (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

A sub-100nA power management system for wireless structure health monitoring applications. - Zhangcai Huang; Yasuaki Inoue (ISCAS, 2011)

A Non-Iterative Method for Calculating the Effective Capacitance of CMOS Gates with Interconnect Load Effect. - Minglu Jiang; Zhangcai Huang; Atsushi Kurokawa; Qiang Li; Bin Lin; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

A retargeting methodology of nano-watt CMOS reference circuit based on advanced compact MOSFET model. - Gong Chen 002; Bo Yang 004; Shigetoshi Nakatake; Zhangcai Huang; Yasuaki Inoue (ISCAS, 2012)

A Globally Convergent Nonlinear Homotopy Method for MOS Transistor Circuits. - Dan Niu; Kazutoshi Sako; Guangming Hu; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012)

Modeling the Overshooting Effect of Multi-Input gate in Nanometer Technologies. - Li Ding; Zhangcai Huang; Minglu Jiang; Atsushi Kurokawa; Yasuaki Inoue (J. Circuits Syst. Comput., 2012)

An analytical model of the overshooting effect for multiple-input gates in nanometer technologies. - Li Ding; Jing Wang; Zhangcai Huang; Atsushi Kurokawa; Yasuaki Inoue (ISCAS, 2013)

Effective Implementation and Embedding Algorithms of CEPTA Method for Finding DC Operating Points. - Zhou Jin 001; Xiao Wu; Dan Niu; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013)

An Effective and Globally Convergent Newton Fixed-Point Homotopy Method for MOS Transistor Circuits. - Dan Niu; Xiao Wu; Zhou Jin 001; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013)

A Magnetic Resonant Coupling Wireless Power Transmission System under Different Load Conditions. - Hanqiu Mo; Yasuaki Inoue (ICITCS, 2014)

A ramping method combined with the damped PTA algorithm to find the DC operating points for nonlinear circuits. - Zhou Jin 001; Xiao Wu; Yasuaki Inoue; Dan Niu (ISIC, 2014)

A high efficiency CMOS rectifier with ON-OFF response compensation for wireless power transfer in biomedical applications. - Qiang Li; Jing Wang; Yasuaki Inoue (ISIC, 2014)

The limitation for the growth of step of DPTA method. - Xiao Wu; Zhou Jin 001; Dan Niu; Yasuaki Inoue (ISIC, 2014)

An Effective Model of the Overshooting Effect for Multiple-Input Gates in Nanometer Technologies. - Li Ding; Zhangcai Huang; Atsushi Kurokawa; Jing Wang; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014)

A netlist implementation of the Newton fixed-point homotopy method for MOS transistor circuits. - Dan Niu; Yasuaki Inoue; Zhou Jin 001; Xiao Wu (MWSCAS, 2015)

A 3.5ppm/°C 0.85V Bandgap Reference Circuit without Resistors. - Jing Wang; Qiang Li; Li Ding; Hirofumi Shinohara; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016)

Accurate Nanopower Supply-Insensitive CMOS Unit Vth Extractor and αVth Extractor with Continuous Variety. - Jing Wang; Li Ding; Qiang Li; Hirofumi Shinohara; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017)

An Adaptive Time-Step Control Method in Damped Pseudo-Transient Analysis for Solving Nonlinear DC Circuit Equations. - Xiao Wu; Zhou Jin 001; Dan Niu; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017)