A Low Power Embedded DRAM Macro for Battery-Operated LSIs. - Takeshi Fujino; Akira Yamazaki; Yasuhiko Taito; Mitsuya Kinoshita; Fukashi Morishita; Teruhiko Amano; Masaru Haraguchi; Makoto Hatakenaka; Atsushi Amo; Atsushi Hachisuka; Kazutami Arimoto; Hideyuki Ozaki (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

An embedded DRAM with a 143-MHz SRAM interface using a sense-synchronized read/write. - Yasuhiko Taito; Tetsushi Tanizaki; Mitsuya Kinoshita; Futoshi Igaue; Takeshi Fujino; Kazutami Arimoto (IEEE J. Solid State Circuits, 2003)

7.3 A 28nm embedded SG-MONOS flash macro for automotive achieving 200MHz read operation and 2.0MB/S write throughput at Ti, of 170°C. - Yasuhiko Taito; Masaya Nakano; Hiromi Okimoto; Daisuke Okada; Takashi Ito; Takashi Kono; Kenji Noguchi; Hideto Hidaka; Tadaaki Yamauchi (ISSCC, 2015)

7.6 A 90nm embedded 1T-MONOS flash macro for automotive applications with 0.07mJ/8kB rewrite energy and endurance over 100M cycles under Tj of 175°C. - Hidenori Mitani; Ken Matsubara; Hiroshi Yoshida; Takashi Hashimoto; Hideaki Yamakoshi; Shinichiro Abe; Takashi Kono; Yasuhiko Taito; Takashi Ito; Takashi Krafuji; Kenji Noguchi; Hideto Hidaka; et al. (ISSCC, 2016)

A 28 nm Embedded Split-Gate MONOS (SG-MONOS) Flash Macro for Automotive Achieving 6.4 GB/s Read Throughput by 200 MHz No-Wait Read Operation and 2.0 MB/s Write Throughput at Tj of 170°C. - Yasuhiko Taito; Takashi Kono; Masaya Nakano; Tomoya Saito; Takashi Ito; Kenji Noguchi; Hideto Hidaka; Tadaaki Yamauchi (IEEE J. Solid State Circuits, 2016)

SONOS Split-Gate eFlash Memory. - Takashi Ito; Yasuhiko Taito (Embedded Flash Memory for Embedded Systems, 2018)

A 24MB Embedded Flash System Based on 28nm SG-MONOS Featuring 240MHz Read Operations and Robust Over-The-Air Software Update for Automotive. - Akihiko Kanda; Takashi Kurafuji; Koichi Takeda; Tomoya Ogawa; Yasuhiko Taito; Kazuo Yoshihara; Masaya Nakano; Takashi Ito; Hiroyuki Kondo; Takashi Kono (VLSI Circuits, 2019)

Essential Roles, Challenges and Development of Embedded MCU Micro-Systems to Innovate Edge Computing for the IoT/AI Age. - Takashi Kono; Yasuhiko Taito; Hideto Hidaka (IEICE Trans. Electron., 2020)

A 40nm Embedded SG-MONOS Flash Macro for High-end MCU Achieving 200MHz Random Read Operation and 7.91Mb/mm2 Density with Charge Assisted Offset Cancellation Sense Amplifier. - Masaya Nakano; Yoshinobu Kaneda; Koichi Takeda; Takahiro Shimoi; Yasunobu Aoki; Satoru Nakanishi; Yosuke Tashiro; Yasuhiko Taito; Ken Matsubara; Munekatsu Nakagawa; Tomoya Ogawa; Takashi Kurafuji; et al. (A-SSCC, 2021)

Session 30 Overview: Non-Volatile Memories Memory Subcommittee. - Yasuhiko Taito; Violante Moschiano; Shinichiro Shiratake (ISSCC, 2021)

A 22nm 32Mb Embedded STT-MRAM Macro Achieving 5.9ns Random Read Access and 5.8MB/s Write Throughput at up to Tj of 150 °C. - Takahiro Shimoi; Ken Matsubara; Tomoya Saito; Tomoya Ogawa; Yasuhiko Taito; Yoshinobu Kaneda; Masayuki Izuna; Koichi Takeda; Hidenori Mitani; Takashi Ito; Takashi Kono (VLSI Technology and Circuits, 2022)

Introduction to the Special Section on the 2021 IEEE International Solid-State Circuits Conference (ISSCC). - Amir Amirkhany; Tanay Karnik; Shidhartha Das; Jun Deguchi; Yasuhiko Taito (IEEE J. Solid State Circuits, 2022)

A 40-nm Embedded SG-MONOS Flash Macro for High-End MCU Achieving 200-MHz Random Read Operation and 7.91-Mb/mm2 Density With Charge-Assisted Offset Cancellation Sense Amplifier. - Masaya Nakano; Yoshinobu Kaneda; Satoru Nakanishi; Yasumitsu Murai; Yosuke Tashiro; Yasuhiko Taito; Tomoya Ogawa; Hidenori Mitani; Takashi Ito; Takashi Kono (IEEE J. Solid State Circuits, 2022)

15.8 A 22nm 10.8Mb Embedded STT-MRAM Macro Achieving over 200MHz Random-Read Access and a 10.4MB/s Write Throughput with an In-Field Programmable 0.3Mb MTJ-OTP for High-End MCUs. - Tomoya Ogawa; Ken Matsubara; Yasuhiko Taito; Tomoya Saito; Masayuki Izuna; Koichi Takeda; Yoshinobu Kaneda; Takahiro Shimoi; Hidenori Mitani; Takashi Ito; Takashi Kono (ISSCC, 2024)

A 22-nm 32-Mb Embedded STT-MRAM Macro Achieving 5.9-ns Random Read Access and 7.4-MB/s Write Throughput at up to 150 °C. - Takahiro Shimoi; Ken Matsubara; Tomoya Saito; Tomoya Ogawa; Yasuhiko Taito; Yoshinobu Kaneda; Masayuki Izuna; Koichi Takeda; Hidenori Mitani; Takashi Ito; Takashi Kono (IEEE J. Solid State Circuits, 2024)