A 9.6-Gb/s HEMT ATM switch LSI with event-controlled FIFO. - Yuu Watanabe; Yasuhiro Nakasha; Yuji Kato; Kohichiro Odani; Masayuki Abe (IEEE J. Solid State Circuits, 1993)

A 43-Gb/s full-rate-clock 4: 1 multiplexer in InP-based HEMT technology. - Yasuhiro Nakasha; Toshihide Suzuki; Hideki Kano; Kouji Tsukashima; Akio Ohya; Ken Sawada; Kozo Makiyama; Tsuyoshi Takahashi; Masahiro Nishi; Tatsuya Hirose; Masahiko Takikawa; Yuu Watanabe (IEEE J. Solid State Circuits, 2002)

A 50-Gbit/s 450-mW Full-Rate 4: 1 Multiplexer With Multiphase Clock Architecture in 0.13-µm InP HEMT Technology. - Toshihide Suzuki; Yoichi Kawano; Yasuhiro Nakasha; Shinji Yamaura; Tsuyoshi Takahashi; Kozo Makiyama; Tatsuya Hirose (IEEE J. Solid State Circuits, 2007)

Performance Analysis of a 10-Gb/s Millimeter-Wave Impulse Radio Transmitter. - Yasuhiro Nakasha; Naoki Hara; Kiyomichi Araki (IEICE Trans. Electron., 2011)

Submillimeter-wave InP HEMT amplifiers with current-reuse topology. - Masaru Sato 001; Shoichi Shiba; Hiroshi Matsumura; Tsuyoshi Takahashi; Toshihide Suzuki; Yasuhiro Nakasha; Naoki Hara (RWS, 2013)

Foreword. - Yasuhiro Nakasha (IEICE Trans. Electron., 2015)

Beyond 110 GHz InP-HEMT Based Mixer Module Using Flip-Chip Assembly for Precise Spectrum Analysis. - Shoichi Shiba; Masaru Sato 001; Hiroshi Matsumura; Yoichi Kawano; Tsuyoshi Takahashi; Toshihide Suzuki; Yasuhiro Nakasha; Taisuke Iwai; Naoki Hara (IEICE Trans. Electron., 2015)

300-GHz Amplifier in 75-nm InP HEMT Technology. - Hiroshi Matsumura; Yoichi Kawano; Shoichi Shiba; Masaru Sato 001; Toshihide Suzuki; Yasuhiro Nakasha; Tsuyoshi Takahashi; Kozo Makiyama; Taisuke Iwai; Naoki Hara (IEICE Trans. Electron., 2016)

Robust Q-Band InP- and GaN-HEMT Low Noise Amplifiers. - Masaru Sato 001; Yoshitaka Niida; Toshihide Suzuki; Yasuhiro Nakasha; Yoichi Kawano; Taisuke Iwai; Naoki Hara; Kazukiyo Joshin (IEICE Trans. Electron., 2017)

A Demultiplexer Immune from Fabrication-Error Impairments as an Enabler of Compact High-Channel-Count (> 64 ch) Dense WDM Systems on Low-End Si PIC Platforms. - Tomoyuki Akiyama; Shoichiro Oda; Seok-Hwan Jeong; Yasuhiro Nakasha; Yu Tanaka; Takeshi Hoshida (OECC/PSC, 2019)

Temperature-Tolerant Crosstalk-Free WDM Demultiplexing Using Controller-Integrated Cascaded AMZ Triplet (CAT) on Si Nano-Waveguide PIC Platform. - Tomoyuki Akiyama; Motoyuki Nishizawa; Akio Sugama; Yasuhiro Nakasha; Shinsuke Tanaka; Yu Tanaka; Takeshi Hoshida (ECOC, 2021)

Demonstration of Crosstalk-Free WDM Demultiplexing on Si Nanowire PIC Controlled by Si CMOS ASIC. - Tomoyuki Akiyama; Motoyuki Nishizawa; Akio Sugama; Yasuhiro Nakasha; Shinsuke Tanaka; Yu Tanaka; Shoichiro Oda; Takeshi Hoshida (OFC, 2021)

First Demonstration of Crosstalk-Free (< -38.5 dB) 32-ch DWDM Demultiplexer on Standard Si PIC Platform. - Tomoyuki Akiyama; Motoyuki Nishizawa; Akio Sugama; Yasuhiro Nakasha; Shinsuke Tanaka; Yu Tanaka; Takeshi Hoshida (OFC, 2022)

High-Efficiency 250-320GHz Power Amplifiers Using InP-Based Metal-Oxide-Semiconductor High-Electron-Mobility Transistors. - Yusuke Kumazaki; Shiro Ozaki; Naoya Okamoto; Naoki Hara; Yasuhiro Nakasha; Masaru Sato 001; Toshihiro Ohki (IEICE Trans. Electron., 2023)

Sub-THz SC-FDE MIMO Systems with Deep Neural Network Equalization for 100 Gbps of 6G. - Liang Zhou; Masafumi Tsutsui; Yasuhiro Nakasha; Shiro Ozaki; Takashi Dateki; Yusuke Kumazaki; Toshihiro Ohki (VTC Fall, 2024)

A 9.3% PAE, 9.2-dBm POUT power amplifier and -1.9-dB Gc upconverting mixer using InP-based MOS HEMTs for 300-GHz phased-array transmitters. - Yasuhiro Nakasha; Shiro Ozaki; Yusuke Kumazaki; Naoya Okamoto; Shoichi Shiba; Masaru Sato 001; Naoki Hara; Toshihiro Ohki (IEICE Electron. Express, 2025)