Measurement and analysis of delay variation due to inductive coupling. - Yasuhiro Ogasahara; Masanori Hashimoto; Takao Onoye (CICC, 2005)

Measurement results of delay degradation due to power supply noise well correlated with full-chip simulation. - Yasuhiro Ogasahara; Takashi Enami; Masanori Hashimoto; Takashi Sato 001; Takao Onoye (CICC, 2006)

Measurement of Inductive Coupling Effect on Timing in 90nm Global Interconnects. - Yasuhiro Ogasahara; Masanori Hashimoto; Takao Onoye (CICC, 2006)

Quantitative Prediction of On-chip Capacitive and Inductive Crosstalk Noise and Discussion on Wire Cross-Sectional Area Toward Inductive Crosstalk Free Interconnects. - Yasuhiro Ogasahara; Masanori Hashimoto; Takao Onoye (ICCD, 2006)

W-CDMA Channel Codec by Configurable Processors. - Masanao Ise; Yasuhiro Ogasahara; Takao Onoye; Isao Shirakawa (Intell. Autom. Soft Comput., 2006)

Dynamic Supply Noise Measurement with All Digital Gated Oscillator for Evaluating Decoupling Capacitance Effect. - Yasuhiro Ogasahara; Masanori Hashimoto; Takao Onoye (CICC, 2007)

Quantitative Prediction of On-Chip Capacitive and Inductive Crosstalk Noise and Tradeoff between Wire Cross-Sectional Area and Inductive Crosstalk Effect. - Yasuhiro Ogasahara; Masanori Hashimoto; Takao Onoye (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop With On-Chip Delay Measurement. - Yasuhiro Ogasahara; Takashi Enami; Masanori Hashimoto; Takashi Sato 001; Takao Onoye (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

Dynamic supply noise measurement circuit composed of standard cells suitable for in-site SoC power integrity verification. - Yasuhiro Ogasahara; Masanori Hashimoto; Takao Onoye (ASP-DAC, 2008)

Impact of Well Edge Proximity Effect on Timing. - Toshiki Kanamoto; Yasuhiro Ogasahara; Keiko Natsume; Kenji Yamaguchi; Hiroyuki Amishiro; Tetsuya Watanabe; Masanori Hashimoto (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008)

Measurement and Analysis of Inductive Coupling Noise in 90 nm Global Interconnects. - Yasuhiro Ogasahara; Masanori Hashimoto; Takao Onoye (IEEE J. Solid State Circuits, 2008)

All-Digital Ring-Oscillator-Based Macro for Sensing Dynamic Supply Noise Waveform. - Yasuhiro Ogasahara; Masanori Hashimoto; Takao Onoye (IEEE J. Solid State Circuits, 2009)

Supply Noise Suppression by Triple-Well Structure. - Yasuhiro Ogasahara; Masanori Hashimoto; Toshiki Kanamoto; Takao Onoye (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Resistivity-based modeling of substrate non-uniformity for low-resistivity substrate. - Toshiki Kanamoto; Hisato Inaba; Toshiharu Chiba; Yasuhiro Ogasahara (IEICE Electron. Express, 2014)

0.39-V, 18.26-µW/MHz SOTB CMOS Microcontroller with embedded atom switch ROM. - Toshitsugu Sakamoto; Yukihide Tsuji; Munehiro Tada; Hideki Makiyama; Takumi Hasegawa; Yoshiki Yamamoto; Shinobu Okanishi; Keiichi Maekawa; Naoki Banno; Makoto Miyamura; Koichiro Okamoto; Noriyuki Iguchi; et al. (COOL Chips, 2015)

Standard cell implementation of buskeeper PUF with symmetric inverters and neighboring cells for passing randomness tests. - Yasuhiro Ogasahara; Yohei Hori; Hanpei Koike (GCCE, 2015)

Impacts of flexible Vth control, low process variability, and steep SS with low on-current of new structure transistors to ultra-low voltage designs. - Yasuhiro Ogasahara; Tadashi Nakagawa; Toshihiro Sekigawa; Toshiyuki Tsutsumi; Hanpei Koike (IEICE Electron. Express, 2015)

A Silicon-on-Thin-Buried-Oxide CMOS Microcontroller with Embedded Atom-Switch ROM. - Toshitsugu Sakamoto; Yukihide Tsuji; Munehiro Tada; Hideki Makiyama; Takumi Hasegawa; Yoshiki Yamamoto; Shinobu Okanishi; Keiichi Maekawa; Naoki Banno; Makoto Miyamura; Koichiro Okamoto; Noriyuki Iguchi; et al. (IEEE Micro, 2015)

Implementation of pseudo linear feedback shift register physical unclonable function on silicon. - Yasuhiro Ogasahara; Yohei Hori; Hanpei Koike (ISCAS, 2016)

Prototype of USB stick-sized PUF module for authentication and key generation. - Toshihiro Katashita; Yohei Hori; Yasuhiro Ogasahara (GCCE, 2017)

Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge-Response pair acquisition using Built-In Self-Test before shipping. - Yasuhiro Ogasahara; Yohei Hori; Toshihiro Katashita; Tomoki Iizuka; Hiromitsu Awano; Makoto Ikeda; Hanpei Koike (Integr., 2020)