A 2.7Gb/s/mm2 0.9pJ/b/chip 1coil/channel ThruChip interface with coupled-resonator-based CDR for NAND Flash memory stacking. - Noriyuki Miura; Yasuhiro Take; Mitsuko Saito; Yoichi Yoshida; Tadahiro Kuroda (ISSCC, 2011)

A vertical bubble flow network using inductive-coupling for 3-D CMPs. - Hiroki Matsutani; Yasuhiro Take; Daisuke Sasaki; Masayuki Kimura; Yuki Ono; Yukinori Nishiyama; Michihiro Koibuchi; Tadahiro Kuroda; Hideharu Amano (NOCS, 2011)

A 30 Gb/s/Link 2.2 Tb/s/mm 2 Inductively-Coupled Injection-Locking CDR for High-Speed DRAM Interface. - Yasuhiro Take; Noriyuki Miura; Tadahiro Kuroda (IEEE J. Solid State Circuits, 2011)

Vertical Link On/Off Control Methods for Wireless 3-D NoCs. - Hao Zhang 020; Hiroki Matsutani; Yasuhiro Take; Tadahiro Kuroda; Hideharu Amano (ARCS, 2012)

Simultaneous data and power transmission using nested clover coils. - Yasuhiro Take; Hayun Chung; Noriyuki Miura; Tadahiro Kuroda (ASP-DAC, 2012)

CMA-Cube: A scalable reconfigurable accelerator with 3-D wireless inductive coupling interconnect. - Yusuke Koizumi; Eiichi Sasaki; Hideharu Amano; Hiroki Matsutani; Yasuhiro Take; Tadahiro Kuroda; Ryuichi Sakamoto; Mitaro Namiki; Kimiyoshi Usami; Masaaki Kondo; Hiroshi Nakamura (FPL, 2012)

Simultaneous 6-Gb/s Data and 10-mW Power Transmission Using Nested Clover Coils for Noncontact Memory Card. - Andrzej Radecki; Yuxiang Yuan; Noriyuki Miura; Iori Aikawa; Yasuhiro Take; Hiroki Ishikuro; Tadahiro Kuroda (IEEE J. Solid State Circuits, 2012)

A case for wireless 3D NoCs for CMPs. - Hiroki Matsutani; Paul Bogdan; Radu Marculescu; Yasuhiro Take; Daisuke Sasaki; Hao Zhang 020; Michihiro Koibuchi; Tadahiro Kuroda; Hideharu Amano (ASP-DAC, 2013)

Demonstration of a heterogeneous multi-core processor with 3-D inductive coupling links. - Yusuke Koizumi; Noriyuki Miura; Yasuhiro Take; Hiroki Matsutani; Tadahiro Kuroda; Hideharu Amano; Ryuichi Sakamoto; Mitaro Namiki; Kimiyoshi Usami; Masaaki Kondo; Hiroshi Nakamura (FPL, 2013)

A scalable 3D heterogeneous multi-core processor with inductive-coupling thruchip interface. - Noriyuki Miura; Yusuke Koizumi; Eiichi Sasaki; Yasuhiro Take; Hiroki Matsutani; Tadahiro Kuroda; Hideharu Amano; Ryuichi Sakamoto; Mitaro Namiki; Kimiyoshi Usami; Masaaki Kondo; Hiroshi Nakamura (Hot Chips Symposium, 2013)

3D clock distribution using vertically/horizontally-coupled resonators. - Yasuhiro Take; Noriyuki Miura; Hiroki Ishikuro; Tadahiro Kuroda (ISSCC, 2013)

Vertical Link On/Off Regulations for Inductive-Coupling Based Wireless 3-D NoCs. - Hao Zhang 020; Hiroki Matsutani; Yasuhiro Take; Tadahiro Kuroda; Hideharu Amano (IEICE Trans. Inf. Syst., 2013)

A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip Interface. - Noriyuki Miura; Yusuke Koizumi; Yasuhiro Take; Hiroki Matsutani; Tadahiro Kuroda; Hideharu Amano; Ryuichi Sakamoto; Mitaro Namiki; Kimiyoshi Usami; Masaaki Kondo; Hiroshi Nakamura (IEEE Micro, 2013)

Low-latency wireless 3D NoCs via randomized shortcut chips. - Hiroki Matsutani; Michihiro Koibuchi; Ikki Fujiwara; Takahiro Kagami; Yasuhiro Take; Tadahiro Kuroda; Paul Bogdan; Radu Marculescu; Hideharu Amano (DATE, 2014)

A 352Gb/s inductive-coupling DRAM/SoC interface using overlapping coils with phase division multiplexing and ultra-thin fan-out wafer level package. - Abdul Raziz Junaidi; Yasuhiro Take; Tadahiro Kuroda (VLSIC, 2014)

3D NoC with Inductive-Coupling Links for Building-Block SiPs. - Yasuhiro Take; Hiroki Matsutani; Daisuke Sasaki; Michihiro Koibuchi; Tadahiro Kuroda; Hideharu Amano (IEEE Trans. Computers, 2014)

Design and analysis for ThruChip design for manufacturing (DFM). - Li-Chung Hsu; Yasuhiro Take; Atsutake Kosuge; So Hasegawa; Junichiro Kadamoto; Tadahiro Kuroda (ASP-DAC, 2015)

Circuit and package design for 44GB/s inductive-coupling DRAM/SoC interface. - Akira Okada; Abdul Raziz Junaidi; Yasuhiro Take; Atsutake Kosuge; Tadahiro Kuroda (ASP-DAC, 2015)

Image sensor/digital logic 3D stacked module featuring inductive coupling channels for high speed/low-noise image transfer. - Masayuki Ikebe; Daisuke Uchida; Yasuhiro Take; Makito Someya; Satoshi Chikuda; Kento Matsuyama; Tetsuya Asai; Tadahiro Kuroda; Masato Motomura (VLSIC, 2015)

A Study of Physical Design Guidelines in ThruChip Inductive Coupling Channel. - Li-Chung Hsu; Junichiro Kadomoto; So Hasegawa; Atsutake Kosuge; Yasuhiro Take; Tadahiro Kuroda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015)

Through Chip Interface Based Three-Dimensional FPGA Architecture Exploration. - Li-Chung Hsu; Masato Motomura; Yasuhiro Take; Tadahiro Kuroda (IEICE Trans. Electron., 2015)

Relay Transmission Thruchip Interface with Low-Skew 3D Clock Distribution Network. - Yasuhiro Take; Tadahiro Kuroda (IEICE Trans. Electron., 2015)

Analytical thruchip inductive coupling channel design optimization. - Li-Chung Hsu; Junichiro Kadomoto; So Hasegawa; Atsutake Kosuge; Yasuhiro Take; Tadahiro Kuroda (ASP-DAC, 2016)

Motion-vector estimation and cognitive classification on an image sensor/processor 3D stacked system featuring ThruChip interfaces. - Tetsuya Asai; Masafumi Mori; Toshiyuki Itou; Yasuhiro Take; Masayuki Ikebe; Tadahiro Kuroda; Masato Motomura (ESSCIRC, 2016)

Efficient 3-D Bus Architectures for Inductive-Coupling ThruChip Interfaces. - Takahiro Kagami; Hiroki Matsutani; Michihiro Koibuchi; Yasuhiro Take; Tadahiro Kuroda; Hideharu Amano (IEEE Trans. Very Large Scale Integr. Syst., 2016)

An image sensor/processor 3D stacked module featuring ThruChip interfaces. - Masayuki Ikebe; Tetsuya Asai; Masafumi Mori; Toshiyuki Itou; Daisuke Uchida; Yasuhiro Take; Tadahiro Kuroda; Masato Motomura (ASP-DAC, 2017)