Something old and something new: P-states can borrow microarchitecture techniques too. - Yasuko Eckert; Srilatha Manne; Michael J. Schulte; David A. Wood 001 (ISLPED, 2012)

Increasing TLB reach by exploiting clustering in page translations. - Binh Pham 003; Abhishek Bhattacharjee; Yasuko Eckert; Gabriel H. Loh (HPCA, 2014)

A comparison of core power gating strategies implemented in modern hardware. - Manish Arora; Srilatha Manne; Yasuko Eckert; Indrani Paul; Nuwan Jayasena; Dean M. Tullsen (SIGMETRICS, 2014)

Interconnect-Memory Challenges for Multi-chip, Silicon Interposer Systems. - Gabriel H. Loh; Natalie D. Enright Jerger; Ajaykumar Kannan; Yasuko Eckert (MEMSYS, 2015)

Prefetching Techniques for Near-memory Throughput Processors. - Reena Panda; Yasuko Eckert; Nuwan Jayasena; Onur Kayiran; Michael Boyer; Lizy Kurian John (ICS, 2016)

Enabling Efficient Dynamic Resizing of Large DRAM Caches via A Hardware Consistent Hashing Mechanism. - Kevin Kai-Wei Chang; Gabriel H. Loh; Mithuna Thottethodi; Yasuko Eckert; Mike O'Connor; Srilatha Manne; Lisa Hsu; Lavanya Subramanian; Onur Mutlu (CoRR, 2016)

Design and Analysis of an APU for Exascale Computing. - Thiruvengadam Vijayaraghavan; Yasuko Eckert; Gabriel H. Loh; Michael J. Schulte; Mike Ignatowski; Bradford M. Beckmann; William C. Brantley; Joseph L. Greathouse; Wei Huang 004; Arun Karunanithi; Onur Kayiran; Mitesh R. Meswani; et al. (HPCA, 2017)

CODA: Enabling Co-location of Computation and Data for Near-Data Processing. - Hyojong Kim; Ramyad Hadidi; Lifeng Nai; Hyesoon Kim; Nuwan Jayasena; Yasuko Eckert; Onur Kayiran; Gabriel H. Loh (CoRR, 2017)

Implications of Integrated CPU-GPU Processors on Thermal and Power Management Techniques. - Kapil Dev; Indrani Paul; Wei Huang 004; Yasuko Eckert; Wayne P. Burleson; Sherief Reda (CoRR, 2018)

CODA: Enabling Co-location of Computation and Data for Multiple GPU Systems. - Hyojong Kim; Ramyad Hadidi; Lifeng Nai; Hyesoon Kim; Nuwan Jayasena; Yasuko Eckert; Onur Kayiran; Gabriel H. Loh (ACM Trans. Archit. Code Optim., 2018)

Analyzing and Leveraging Shared L1 Caches in GPUs. - Mohamed Assem Ibrahim; Onur Kayiran; Yasuko Eckert; Gabriel H. Loh; Adwait Jog (PACT, 2020)

Experiences with ML-Driven Design: A NoC Case Study. - Jieming Yin; Subhash Sethumurugan; Yasuko Eckert; Chintan Patel; Alan Smith 003; Eric Morton; Mark Oskin; Natalie D. Enright Jerger; Gabriel H. Loh (HPCA, 2020)

Analyzing and Leveraging Decoupled L1 Caches in GPUs. - Mohamed Assem Ibrahim; Onur Kayiran; Yasuko Eckert; Gabriel H. Loh; Adwait Jog (HPCA, 2021)

DUB: dynamic underclocking and bypassing in nocs for heterogeneous GPU workloads. - Srikant Bharadwaj; Shomit Das; Yasuko Eckert; Mark Oskin; Tushar Krishna (NOCS, 2021)

Accelerating Variational Quantum Algorithms Using Circuit Concurrency. - Salonik Resch; Anthony Gutierrez; Joon Suk Huh; Srikant Bharadwaj; Yasuko Eckert; Gabriel H. Loh; Mark Oskin; Swamit S. Tannu (CoRR, 2021)

A Research Retrospective on AMD's Exascale Computing Journey. - Gabriel H. Loh; Michael J. Schulte; Mike Ignatowski; Vignesh Adhinarayanan; Shaizeen Aga; Derrick Aguren; Varun Agrawal; Ashwin M. Aji; Johnathan Alsop; Paul T. Bauman; Bradford M. Beckmann; Majed Valad Beigi; et al. (ISCA, 2023)