A 22-ns 1-Mbit CMOS high-speed DRAM with address multiplexing. - Nicky Chau-Chun Lu; Gary B. Bronner; Koji Kitamura; Roy E. Scheuerlein; Walter H. Henkels; Sang H. Dhong; Yasunao Katayama; Toshiaki Kirihata; Hideto Niijima; Robert L. Franch; Wei Wang; Motoo Nishiwaki; et al. (IEEE J. Solid State Circuits, 1989)

A pulsed sensing scheme with a limited bit-line swing. - Roy E. Scheuerlein; Yasunao Katayama; Toshiaki Kirihata; Yoshinori Sakaue; Akashi Satoh; Toshio Sunaga; T. Yoshikawa; Koji Kitamura; Sang H. Dhong (IEEE J. Solid State Circuits, 1992)

A 14-ns 14-Mb CMOS DRAM with 300-mW active power. - Toshiaki Kirihata; Sang H. Dhong; Koji Kitamura; Toshio Sunaga; Yasunao Katayama; Roy E. Scheuerlein; Akashi Satoh; Yoshinori Sakaue; Kentaroh Tobimatsu; Koji Hosokawa; Takaki Saitoh; Takefumi Yoshikawa; et al. (IEEE J. Solid State Circuits, 1992)

Development of a High Bandwidth Merged Logic/DRAM Multimedia Chip. - W. K. Luk; Yasunao Katayama; Wei Hwang; Matthew R. Wordeman; Toshiaki Kirihata; Akashi Satoh; Seiji Munetoh; Hing Wong; B. El-Kareh; P. Xiao; Rajiv V. Joshi (ICCD, 1997)

Trends in semiconductor memories. - Yasunao Katayama (IEEE Micro, 1997)

Fault-Tolerant Refresh Power Reduction of DRAMs for Quasi-Nonvolatile Data Retention. - Yasunao Katayama; Eric J. Stuckey; Sumio Morioka; Zhao Wu (DFT, 1999)

Design Methodology for a One-Shot Reed-Solomon Encoder and Decoder. - Sumio Morioka; Yasunao Katayama (ICCD, 1999)

Efficient Error Correction Code Configurations for Quasi-Nonvolatile Data Retention by DRAMs. - Yasunao Katayama; Yasushi Negishi; Sumio Morioka (DFT, 2000)

One-Shot Reed-Solomon Decoding for High-Performance Dependable Systems. - Yasunao Katayama; Sumio Morioka (DSN, 2000)

Towards Efficient Verification of Arithmetic Algorithms over Galois Fields GF(2m). - Sumio Morioka; Yasunao Katayama; Toshiyuki Yamane (CAV, 2001)

An ultra-fast Reed-Solomon decoder soft-IP with 8-error correcting capability. - Toshiyuki Yamane; Yasunao Katayama (ICASSP (2), 2003)

Bit error rate analysis on iterative two-stage decoding of two dimensional codes by importance sampling. - Toshiyuki Yamane; Yasunao Katayama (ICC, 2003)

Multiple-Packet Recovery Technique using Partially-Overlapped Block Codes. - Yasunao Katayama; Daiju Nakano (ISIT, 2006)

2-Gbps Uncompressed HDTV Transmission over 60-GHz SiGe Radio Link. - Yasunao Katayama; Chuck Haymes; Daiju Nakano; Troy J. Beukema; Brian A. Floyd; Scott K. Reynolds; Ullrich R. Pfeiffer; Brian P. Gaucher; Kai Schleupen (CCNC, 2007)

Optical Interconnect Opportunities for Future Server Memory Systems. - Yasunao Katayama; Atsuya Okazaki (HPCA, 2007)

Multi-Gbps wireless systems over 60-GHz SiGe radio link with BW-efficient noncoherent detections. - Yasunao Katayama; Daiju Nakano; Alberto Valdes-Garcia; Troy J. Beukema; Scott K. Reynolds (ICME, 2008)

Universal optical multi-drop bus for heterogeneous memory architecture. - Atsuya Okazaki; Yasunao Katayama; Seiji Munetoh (Conf. Computing Frontiers, 2011)

Multi-Gbps 60-GHz single-carrier system using a low-power coherent detection technique. - Daiju Nakano; Yasuteru Kohda; Kohji Takano; Toshiyuki Yamane; Nobuyuki Ohba; Yasunao Katayama (COOL Chips, 2011)

Instant multimedia contents downloading system using a 60-GHZ-2.4-GHZ hybrid wireless link. - Yasuteru Kohda; Nobuyuki Ohba; Kohji Takano; Daiju Nakano; Toshiyuki Yamane; Yasunao Katayama (ICME, 2011)

Wireless data center networking with steered-beam mmWave links. - Yasunao Katayama; Kohji Takano; Yasuteru Kohda; Nobuyuki Ohba; Daiju Nakano (WCNC, 2011)

Multimedia content-downloading system using millimeter-wave attached memory. - Nobuyuki Ohba; Kohji Takano; Yasuteru Kohda; Daiju Nakano; Toshiyuki Yamane; Yasunao Katayama (CCNC, 2012)

An effective initialization of interference cancellation algorithms for distributed MIMO systems in wireless datacenters. - Toshiyuki Yamane; Yasunao Katayama (GLOBECOM, 2012)

MIMO link design strategy for wireless data center applications. - Yasunao Katayama; Toshiyuki Yamane; Yasuteru Kohda; Kohji Takano; Daiju Nakano; Nobuyuki Ohba (WCNC, 2012)

Software-defined massive multicore networking via freespace optical interconnect. - Yasunao Katayama; Atsuya Okazaki; Nobuyuki Ohba (Conf. Computing Frontiers, 2013)

Hopfield-Type Associative Memory with Sparse Modular Networks. - Gouhei Tanaka; Toshiyuki Yamane; Daiju Nakano; Ryosho Nakane; Yasunao Katayama (ICONIP (1), 2014)

Non-intrusive Scalable Memory Access Tracer. - Nobuyuki Ohba; Seiji Munetoh; Atsuya Okazaki; Yasunao Katayama (QEST, 2014)

An Energy-Efficient Computing Approach by Filling the Connectome Gap. - Yasunao Katayama; Toshiyuki Yamane; Daiju Nakano (UCNC, 2014)

60-GHz single-carrier coherent detection system with robust 16-QAM signal recovery. - Daiju Nakano; Yasuteru Kohda; Kohji Takano; Nobuyuki Ohba; Toshiyuki Yamane; Yasunao Katayama (WCNC, 2014)

Single-channel full-duplex mmWave link using phased-array for Ethernet. - Yasuteru Kohda; Kohji Takano; Daiju Nakano; Nobuyuki Ohba; Toshiyuki Yamane; Yasunao Katayama (CCNC, 2015)

Wave-Based Reservoir Computing by Synchronization of Coupled Oscillators. - Toshiyuki Yamane; Yasunao Katayama; Ryosho Nakane; Gouhei Tanaka; Daiju Nakano (ICONIP (3), 2015)

Regularity and randomness in modular network structures for neural associative memories. - Gouhei Tanaka; Toshiyuki Yamane; Daiju Nakano; Ryosho Nakane; Yasunao Katayama (IJCNN, 2015)

Wave-based device scaling concept for brain-like energy efficiency and integration. - Yasunao Katayama; Toshiyuki Yamane; Daiju Nakano; Ryosho Nakane; Gouhei Tanaka (NANOARCH, 2015)

Brain-Inspired Memory Architecture for Sparse Nonlocal and Unstructured Workloads. - Yasunao Katayama (Conf. Computing Frontiers, 2017)

Channel Model for Spiking Neural Networks Inspired by Impulse Radio MIMO Transmission. - Yasunao Katayama (GLOBECOM, 2019)

Like Quantum Computing without Quantum Physics: Is it How the Brain Works? - Yasunao Katayama (CoRR, 2019)

Spatially Arranged Sparse Recurrent Neural Networks for Energy Efficient Associative Memory. - Gouhei Tanaka; Ryosho Nakane; Tomoya Takeuchi; Toshiyuki Yamane; Daiju Nakano; Yasunao Katayama; Akira Hirose 001 (IEEE Trans. Neural Networks Learn. Syst., 2020)