Design of a Set Logic Network Based on Frequency Multiplexing and Its Applications to Image Processing. - Yasushi Yuminaka; Takafumi Aoki; Tatsuo Higuchi 001 (ISMVL, 1991)

Design of Set-Valued Logic Networks for Wave-Parallel Computing. - Yasushi Yuminaka; Takafumi Aoki; Tatsuo Higuchi 001 (ISMVL, 1993)

Design of Wave-Parallel Computing Circuits for Densely Connected Architectures. - Yasushi Yuminaka; Takafumi Aoki; Tatsuo Higuchi 001 (ISMVL, 1994)

Wave-Parallel Computing Technique for Neural Networks Based on Amplitude-Modulated Waves. - Yasushi Yuminaka; Yoshisato Sasaki; Takafumi Aoki; Tatsuo Higuchi 001 (ISMVL, 1996)

Wave-Parallel Computing Systems using Multiple-Valued Pseudo-Orthogonal Sequences. - Yasushi Yuminaka; Yoshisat Sasaki; Takafumi Aoki; Tatsuo Higuchi 001 (ISMVL, 1998)

A high-speed CMOS track/hold circuit. - Mohd Asmawi Mohamed Zin; Haruo Kobayashi 001; Kazuya Kobayashi; Jun-ichi Ichimura; Hao San; Yoshitaka Onaya; Yasuyuki Kimura; Yasushi Yuminaka; Yoshisato Sasaki; Kouji Tanaka; Fuminori Abe (ICECS, 1999)

An Efficient Data Transmission Technique for VLSI Systems Based on Multiple-Valued Code-Division Multiple Access. - Yasushi Yuminaka; Osamu Katoh; Yoshisat Sasaki; Takafumi Aoki; Tatsuo Higuchi 001 (ISMVL, 2000)

Multiple-Valued Data Recovery Techniques for Band-Limited Channels in VLSI. - Yasushi Yuminaka; Tatsuya Morishita; Takafumi Aoki; Tatsuo Higuchi 001 (ISMVL, 2002)

Intra/Inter-Chip CDMA Communications for Efficient Data Transmission Towards New Paradigm of Computing. - Yasushi Yuminaka (J. Multiple Valued Log. Soft Comput., 2005)

Equalization Techniques for Multiple-Valued Data Transmission and Their Application. - Yasushi Yuminaka; Kazuyoshi Yamamura (J. Multiple Valued Log. Soft Comput., 2007)

Time-Domain Pre-Emphasis Techniques for Equalization of Multiple-Valued Data. - Yasushi Yuminaka; Yasunori Takahashi (ISMVL, 2008)

Multiple-Valued Data Transmission Based on Time-Domain Pre-emphasis Techniques in Consideration of Higher-Order Channel Effects. - Yasushi Yuminaka; Yasunori Takahashi; Kenichi Henmi (ISMVL, 2009)

Time-Domain Pre-Emphasis Techniques for Multiple Valued Data Transmission. - Yasushi Yuminaka; Yasunori Takahashi (J. Multiple Valued Log. Soft Comput., 2009)

A Ternary Partial-Response Signaling Scheme for Capacitively Coupled Interface. - Yasushi Yuminaka; Kyohei Kawano (ISMVL, 2010)

Multiple-Valued Data Transmission Based on Time-Domain Pre-Emphasis Techniques. - Yasushi Yuminaka; Yasunori Takahashi; Kenichi Henmi (IEICE Trans. Inf. Syst., 2010)

Efficient Data Transmission Using Multiple-Valued Pulse-Position Modulation. - Yasushi Yuminaka; Masaaki Okui (ISMVL, 2012)

A Bandwidth-Efficient Ternary Signaling Scheme for 1-D Partial-Response Channels. - Yasushi Yuminaka; Kyohei Kawano (J. Multiple Valued Log. Soft Comput., 2012)

Evaluation of High-Speed Interfaces for VLSI Systems Using Tomlinson-Harashima Precoding. - Yosuke Iijima; Yasushi Yuminaka (ISMVL, 2014)

Comparison of Spectrally Efficient Coding Techniques for High-Speed Serial Links. - Yasushi Yuminaka; Yuki Takada; Tomonao Okada; Yosuke Iijima (ISMVL, 2014)

High-Speed Interconnection for VLSI Systems Using Multiple-Valued Signaling with Tomlinson-Harashima Precoding. - Yosuke Iijima; Yuki Takada; Yasushi Yuminaka (IEICE Trans. Inf. Syst., 2014)

Double-Rate Equalization Using Tomlinson-Harashima Precoding for Multi-valued Data Transmission. - Yosuke Iijima; Yasushi Yuminaka (ISMVL, 2016)

Multiple-Valued Signaling for High-Speed Serial Links Using Tomlinson-Harashima Precoding. - Yasushi Yuminaka; Yosuke Iijima (IEEE J. Emerg. Sel. Topics Circuits Syst., 2016)

Comparison of Spectrally Efficient Coding Techniques for High-Speed VLSI Data Transmission. - Yasushi Yuminaka; Yuuki Takada; Tomonao Okada (J. Multiple Valued Log. Soft Comput., 2016)

PAM-4 Eye Diagram Analysis and Its Monitoring Technique for Adaptive Pre-Emphasis for Multi-valued Data Transmissions. - Yasushi Yuminaka; Takuya Kitamura; Yosuke Iijima (ISMVL, 2017)

Double-Rate Tomlinson-Harashima Precoding for Multi-Valued Data Transmission. - Yosuke Iijima; Yasushi Yuminaka (IEICE Trans. Inf. Syst., 2017)

Multi-valued Signal Generation and Measurement for PAM-4 Serial-Link Test. - Natsuki Sato; Takahito Chigira; Kohei Toyoda; Yosuke Iijima; Yasushi Yuminaka (ISMVL, 2018)

Waveform Shaping Transmitter Combining Digital and Analog Circuits for Multi - Valued Signaling. - Yosuke Iijima; Yasushi Yuminaka (ISMVL, 2019)

PAM-4 Eye-Opening Monitoring Techniques Using Gaussian Mixture Model. - Yosuke Iijima; Keigo Taya; Yasushi Yuminaka (ISMVL, 2020)

Statistical Waveform Evaluation Method for Adaptive PAM-4 Equalization. - Keigo Taya; Yasushi Yuminaka; Yosuke Iijama (FLAP, 2020)

PAM-4 Signal Transmitter using FPGA and DAC for Serial-link Test. - Yasushi Yuminaka; Natsuki Sato; Takahito Chigira; Kohei Toyoda; Yosuke Iijima (FLAP, 2020)

A Subthreshold Spiking Neuron Circuit Based on the Izhikevich Model. - Shigeo Sato; Satoshi Moriya; Yuka Kanke; Hideaki Yamamoto; Yoshihiko Horio; Yasushi Yuminaka; Jordi Madrenas (ICANN (5), 2021)

Efficient PAM-4 Data Transmission with Closed Eye Using Symbol Distribution Estimation. - Yosuke Iijima; Yasushi Yuminaka (ISMVL, 2021)

PAM-4 Eye-Opening Monitor Technique Using Gaussian Mixture Model for Adaptive Equalization. - Yosuke Iijima; Keigo Taya; Yasushi Yuminaka (IEICE Trans. Inf. Syst., 2021)

A Fully Analog CMOS Implementation of a Two-variable Spiking Neuron in the Subthreshold Region and its Network Operation. - Satoshi Moriya; Hideaki Yamamoto; Shigeo Sato; Yasushi Yuminaka; Yoshihiko Horio; Jordi Madrenas (IJCNN, 2022)

Two-Dimensional Symbol Mapping for Evaluating Multi-Valued Data Transmission Quality. - Yosuke Iijima; Kazuharu Nakajima; Yasushi Yuminaka (ISMVL, 2022)

Efficient PAM-4 Symbol Estimation Using Soft Clustering. - Yosuke Iijima; Yasushi Yuminaka (FLAP, 2022)

Evaluation and Symbol Classification of Multi-Valued Signaling Using Two-Dimensional Symbol Mapping with Linear Mixture Model. - Yosuke Iijima; Kazuharu Nakajima; Yasushi Yuminaka (ISMVL, 2023)

PAM-4 Data Transmission Quality Evaluation Using Two- and Three-Dimensional Mapping of Received Symbols. - Yasushi Yuminaka; Kazuharu Nakajima; Yosuke Iijima (ISMVL, 2023)

Multi-Valued Data Transmission Quality Evaluation Using Two-Dimensional PAM-4 Symbol Mapping. - Kazuharu Nakajima; Yasushi Yuminaka; Yosuke Iijima (FLAP, 2023)

Design of Mixed-Signal LSI with Analog Spiking Neural Network and Digital Inference Circuits for Reservoir Computing. - Satoshi Moriya; Hideaki Yamamoto; Masaya Ishikawa; Yasushi Yuminaka; Yoshihiko Horio; Jordi Madrenas; Shigeo Sato (IJCNN, 2024)

Equalization for Compensation of Intersymbol Relationship of Multi-Valued Signaling Using Two-Dimensional Symbol Mapping. - Yosuke Iijima; Atsunori Okada; Yasushi Yuminaka (ISMVL, 2024)

Specialized Waveform Equalization Techniques for Multi-Valued Data Transmission. - Yasushi Yuminaka; Hayate Hasegawa; Nagito Ishida; Yosuke Iijima (ISMVL, 2024)

Evaluation of Multi-Valued Data Transmission in Two-Dimensional Symbol Mapping using Linear Mixture Model. - Yosuke Iijima; Atsunori Okada; Yasushi Yuminaka (IEICE Trans. Inf. Syst., 2024)

Foreword. - Yasushi Yuminaka (IEICE Trans. Inf. Syst., 2024)

Evaluating PAM-4 Data Transmission Quality Using Multi-Dimensional Mapping of Received Symbols. - Yasushi Yuminaka; Kazuharu Nakajima; Yosuke Iijima (IEICE Trans. Inf. Syst., 2024)

Multi-Valued Data Transmission System Using Mild Waveform Shaping Based on Multi-Dimensional Symbol Mapping. - Yosuke Iijima; Atsunori Okada; Yasushi Yuminaka (ISMVL, 2025)

Visualization of the Waveform Shaping Effect of Higher-order FFEs Using Multi-Valued Symbol Mapping. - Yasushi Yuminaka; Ryou Andachi; Haohao Zhang; Yosuke Iijima (ISMVL, 2025)