Design for Testability of a 32-Bit Microprocessor, the TX1. - Yasuyuki Nozuyama; Akira Nishimura; Jun Iwamura (ITC, 1988)

Implementation and Evaluation of Microinstruction-Controlled Self Test Using a Masked Microinstruction Scheme. - Yasuyuki Nozuyama; Akira Nishimura; Jun Iwamura (ITC, 1989)

Design for testability of a 32-bit TRON microprocessor. - Yasuyuki Nozuyama; Akira Nishimura; Jun Iwamura (Microprocess. Microsystems, 1989)

Realization of an efficient design verification test used on a microinstruction controlled self test. - Yasuyuki Nozuyama (ITC, 1990)

Invisible delay quality - SDQM model lights up what could not be seen. - Yasuo Sato; Shuji Hamada; Toshiyuki Maeda; Atsuo Takatori; Yasuyuki Nozuyama; Seiji Kajihara (ITC, 2005)