Logic-In-Memory Architecture For Min/Max Search. - Marco Vacca; Yaswanth Tavva; Anupam Chattopadhyay; Andrea Calimera (ICECS, 2018)

ReRAM-based In-Memory Computation of Galois Field arithmetic. - Swagata Mandal; Debjyoti Bhattacharjee; Yaswanth Tavva; Anupam Chattopadhyay (VLSI-SoC, 2018)

ReRAM Based In-Memory Computation of Single Bit Error Correcting BCH Code. - Swagata Mandal; Yaswanth Tavva; Debjyoti Bhattacharjee; Anupam Chattopadhyay (VLSI-SoC (Selected Papers), 2018)

Secure Your SoC: Building System-an-Chip Designs for Security. - Shivam Bhasin; Trevor E. Carlson; Anupam Chattopadhyay; Vinay B. Y. Kumar; Avi Mendelson; Romain Poussier; Yaswanth Tavva (SoCC, 2020)

Efficient Quantum Circuits for Square-Root and Inverse Square-Root. - Srijit Dutta; Yaswanth Tavva; Debjyoti Bhattacharjee; Anupam Chattopadhyay (VLSID, 2020)

You Only Spike Once: Improving Energy-Efficient Neuromorphic Inference to ANN-Level Accuracy. - Srivatsa P; Kyle Timothy Ng Chu; Yaswanth Tavva; Jibin Wu; Malu Zhang; Haizhou Li 001; Trevor E. Carlson (CoRR, 2020)

Crossbar-Constrained Technology Mapping for ReRAM Based In-Memory Computing. - Debjyoti Bhattacharjee; Yaswanth Tavva; Arvind Easwaran; Anupam Chattopadhyay (IEEE Trans. Computers, 2020)

Sentry-NoC: a statically-scheduled NoC for secure SoCs. - Ahmed Shalaby 001; Yaswanth Tavva; Trevor E. Carlson; Li-Shiuan Peh (NOCS, 2021)

Autonomous Vehicle: Security by Design. - Anupam Chattopadhyay; Kwok-Yan Lam; Yaswanth Tavva (IEEE Trans. Intell. Transp. Syst., 2021)

PARADISE: Criticality-Aware Instruction Reordering for Power Attack Resistance. - Yun Chen 004; Ali Hajiabadi; Romain Poussier; Yaswanth Tavva; Andreas Diavastos; Shivam Bhasin; Trevor E. Carlson (ACM Trans. Archit. Code Optim., 2025)

CTScan: A CGRA-based Platform for the Emulation of Power Side-Channel Attacks on Edge CPUs. - Yaswanth Tavva; Rohan Juneja; Trevor E. Carlson; Li-Shiuan Peh (ACM Trans. Reconfigurable Technol. Syst., 2025)