Design of inverse class-E amplifier with finite D.C. feed inductance. - Yong-qing Leng; Li-jun Zhang; Yun Zeng; Hui Lu; Zhanqi Zheng; Yatao Peng; Jin Guan; Guo-Liang Zhang; Wei Peng (Microelectron. J., 2013)

Low-Phase-Noise Wideband Mode-Switching Quad-Core-Coupled mm-wave VCO Using a Single-Center-Tapped Switched Inductor. - Yatao Peng; Jun Yin 001; Pui-In Mak; Rui Paulo Martins (IEEE J. Solid State Circuits, 2018)

A Wideband Low-Power Cryogenic CMOS Circulator for Quantum Applications. - Andrea Ruffino; Yatao Peng; Fabio Sebastiano; Masoud Babaie; Edoardo Charbon (IEEE J. Solid State Circuits, 2020)

A Fully-Integrated 40-nm 5-6.5 GHz Cryo-CMOS System-on-Chip with I/Q Receiver and Frequency Synthesizer for Scalable Multiplexed Readout of Quantum Dots. - Andrea Ruffino; Yatao Peng; Tsung-Yeh Yang; John Michniewicz; Miguel Fernando Gonzalez-Zalba; Edoardo Charbon (ISSCC, 2021)

A Cryogenic Broadband Sub-1-dB NF CMOS Low Noise Amplifier for Quantum Applications. - Yatao Peng; Andrea Ruffino; Edoardo Charbon (IEEE J. Solid State Circuits, 2021)

A Cryogenic SiGe BiCMOS Hybrid Class B/C Mode-Switching VCO Achieving 201dBc/Hz Figure-of-Merit and 4.2GHz Frequency Tuning Range. - Yatao Peng; Andrea Ruffino; Jad Benserhir; Edoardo Charbon (ISSCC, 2022)

A Cryo-CMOS Wideband Quadrature Receiver With Frequency Synthesizer for Scalable Multiplexed Readout of Silicon Spin Qubits. - Yatao Peng; Andrea Ruffino; Tsung-Yeh Yang; John Michniewicz; Miguel Fernando Gonzalez-Zalba; Edoardo Charbon (IEEE J. Solid State Circuits, 2022)

A Cryogenic Double-IF SSB Controller with Image Suppression and On-Chip Filtering implemented in 130nm SiGe BiCMOS Technology for Superconducting Qubit Control. - Yatao Peng; Jad Benserhir; Yating Zou; Edoardo Charbon (CICC, 2024)

Optimizing RF Readout for Silicon Spin Qubits in an Access Array. - John Michniewicz; Andrea Ruffino; Yatao Peng; Louis Hutin; Benoit Bertrand; Edoardo Charbon; Miguel Fernando Gonzalez-Zalba; Tsung-Yeh Yang (IEEE Trans. Instrum. Meas., 2025)

Analysis and Design of a Type-II Reference-Sampling PLL Using Gain-Boosting Phase Detector With Sampling Capacitor Reduction. - Tailong Xu; Haoran Li; Xi Meng; Xiangxun Zhan; Yatao Peng; Jun Yin 001; Shiheng Yang; Chao Fan; Zhixiang Huang; Rui Paulo Martins; Pui-In Mak (IEEE Trans. Circuits Syst. II Express Briefs, 2025)

A Systematic Review of Voltage Reference Circuits: Spanning Room Temperature to Cryogenic Applications. - Chen Deng; Sai Wu; Chengcheng Liu; Yatao Peng; Man-Kay Law; Jun Yin 001; Rui Paulo Martins; Pui-In Mak (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)