Probabilistic Evaluation of On-Line Checks in Fault-Tolerant Multiprocessor Systems. - V. S. S. Nair; Yatin Vasant Hoskote; Jacob A. Abraham (IEEE Trans. Computers, 1992)

Abstraction of data path registers for multilevel verification of large circuits. - Yatin Vasant Hoskote; John Moondanos; Jacob A. Abraham; Donald S. Fussell (Great Lakes Symposium on VLSI, 1994)

Verification of Circuits Described in VHDL through Extraction of Design Intent. - Yatin Vasant Hoskote; John Moondanos; Jacob A. Abraham; Donald S. Fussell (VLSI Design, 1994)

Automated verification of temporal properties specified as state machines in VHDL. - Yatin Vasant Hoskote; Jacob A. Abraham; Donald S. Fussell (Great Lakes Symposium on VLSI, 1995)

Automatic extraction of the control flow machine and application to evaluating coverage of verification vectors. - Yatin Vasant Hoskote; Dinos Moundanos; Jacob A. Abraham (ICCD, 1995)

Verification of transient response of linear analog circuits. - Ashok Balivada; Yatin Vasant Hoskote; Jacob A. Abraham (VTS, 1995)

Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking. - Yirng-An Chen; Edmund M. Clarke; Pei-Hsin Ho; Yatin Vasant Hoskote; Timothy Kam; Manpreet Khaira; John W. O'Leary; Xudong Zhao 005 (FMCAD, 1996)

A Unified Framework for Design Validation and Manufacturing Test. - Dinos Moundanos; Jacob A. Abraham; Yatin Vasant Hoskote (ITC, 1996)

Automatic verification of implementations of large circuits against HDL specifications. - Yatin Vasant Hoskote; Jacob A. Abraham; Donald S. Fussell; John Moondanos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997)

Abstraction Techniques for Validation Coverage Analysis and Test Generation. - Dinos Moundanos; Jacob A. Abraham; Yatin Vasant Hoskote (IEEE Trans. Computers, 1998)

Coverage Estimation for Symbolic Model Checking. - Yatin Vasant Hoskote; Timothy Kam; Pei-Hsin Ho; Xudong Zhao 005 (DAC, 1999)

A TCP offload accelerator for 10 Gb/s Ethernet in 90-nm CMOS. - Yatin Vasant Hoskote; Bradley A. Bloechel; Gregory E. Dermer; Vasantha Erraguntla; David Finan; Jason Howard; Dan Klowden; Siva G. Narendra; Greg Ruhl; James W. Tschanz; Sriram R. Vangal; Venkat Veeramachaneni; et al. (IEEE J. Solid State Circuits, 2003)

A 6.2-GFlops Floating-Point Multiply-Accumulator With Conditional Normalization. - Sriram R. Vangal; Yatin Vasant Hoskote; Nitin Borkar; Atila Alvandpour (IEEE J. Solid State Circuits, 2006)

Guest Editors' Introduction: Tackling Key Problems in NoCs. - Yatin Vasant Hoskote; Radu Marculescu; Li-Shiuan Peh (IEEE Des. Test Comput., 2008)

An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS. - Sriram R. Vangal; Jason Howard; Gregory Ruhl; Saurabh Dighe; Howard Wilson; James W. Tschanz; David Finan; Arvind P. Singh; Tiju Jacob; Shailendra Jain; Vasantha Erraguntla; Clark Roberts; et al. (IEEE J. Solid State Circuits, 2008)

Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives. - Radu Marculescu; Ümit Y. Ogras; Li-Shiuan Peh; Natalie D. Enright Jerger; Yatin Vasant Hoskote (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS. - Jason Howard; Saurabh Dighe; Yatin Vasant Hoskote; Sriram R. Vangal; David Finan; Gregory Ruhl; David Jenkins; Howard Wilson; Nitin Borkar; Gerhard Schrom; Fabric Pailet; Shailendra Jain; et al. (ISSCC, 2010)

A 90mW/GFlop 3.4GHz Reconfigurable Fused/Continuous Multiply-Accumulator for Floating-Point and Integer Operands in 65nm. - Shailendra Jain; Vasantha Erraguntla; Sriram R. Vangal; Yatin Vasant Hoskote; Nitin Borkar; Tulasi Mandepudi; V. P. Karthik (VLSI Design, 2010)

A 2 Tb/s 6 , ˟, 4 Mesh Network for a Single-Chip Cloud Computer With DVFS in 45 nm CMOS. - Praveen Salihundam; Shailendra Jain; Tiju Jacob; Shasi Kumar; Vasantha Erraguntla; Yatin Vasant Hoskote; Sriram R. Vangal; Gregory Ruhl; Nitin Borkar (IEEE J. Solid State Circuits, 2011)

A Reconfigurable On-die Traffic Generator in 45nm CMOS for a 48 iA-32 Core Network-on-Chip. - Praveen Salihundam; Mohammed Asadullah Khan; Shailendra Jain; Yatin Vasant Hoskote; Satish Yada; Shasi Kumar; Vasantha Erraguntla; Sriram R. Vangal; Nitin Borkar (VLSI Design, 2012)