A high-speed and high-performance full adder cell based on 32-nm CNFET technology for low voltages. - Yavar Safaei Mehrabani; Zahra Zareei; Ahmad Khademzadeh (Int. J. High Perform. Syst. Archit., 2013)

A Symmetric, Multi-Threshold, High-Speed and Efficient-Energy 1-Bit Full Adder Cell Design Using CNFET Technology. - Yavar Safaei Mehrabani; Mohammad Eshghi (Circuits Syst. Signal Process., 2015)

Erratum to: A Symmetric, Multi-Threshold, High-Speed and Efficient-Energy 1-Bit Full Adder Cell Design Using CNFET Technology. - Yavar Safaei Mehrabani; Mohammad Eshghi (Circuits Syst. Signal Process., 2015)

A novel low-energy CNFET-based full adder cell using pass-transistor logic. - Yavar Safaei Mehrabani; Reza Faghih Mirzaee; Mohammad Eshghi (Int. J. High Perform. Syst. Archit., 2015)

High-Speed, High-Frequency and Low-PDP, CNFET Full Adder Cells. - Yavar Safaei Mehrabani; Mohammad Eshghi (J. Circuits Syst. Comput., 2015)

Noise and Process Variation Tolerant, Low-Power, High-Speed, and Low-Energy Full Adders in CNFET Technology. - Yavar Safaei Mehrabani; Mohammad Eshghi (IEEE Trans. Very Large Scale Integr. Syst., 2016)

A novel high-performance and reliable multi-threshold CNFET full adder cell design. - Yavar Safaei Mehrabani; Mohammad Hossein Shafiabadi (Int. J. High Perform. Syst. Archit., 2017)

A Novel High-Speed, Low-Power CNTFET-Based Inexact Full Adder Cell for Image Processing Application of Motion Detector. - Yavar Safaei Mehrabani; Reza Faghih Mirzaee; Zahra Zareei; Seyedeh Mohtaram Daryabari (J. Circuits Syst. Comput., 2017)

Design of efficient approximate 1-bit Full Adder cells using CNFET technology applicable in motion detector systems. - Zahra Zareei; Mehdi Bagherizadeh; Mohammad Hossein Shafiabadi; Yavar Safaei Mehrabani (Microelectron. J., 2021)

Design and implementation of an ASIP for SHA-3 hash algorithm. - Yavar Safaei Mehrabani; Roghayeh Ataie; Mohammad Hossein Shafiabadi; Abolghasem Ghasempour (Int. J. Inf. Comput. Secur., 2022)

A Novel Highly-Efficient Inexact Full Adder Cell for Motion and Edge Detection Systems of Image Processing in CNFET Technology. - Yavar Safaei Mehrabani; Samaneh Goldani Gigasari; Mohammad Mirzaei; Hamidreza Uoosefian (ACM J. Emerg. Technol. Comput. Syst., 2022)

Image processing with high-speed and low-energy approximate arithmetic circuit. - Akram Mohammadi; Mokhtar Mohammadi Ghanatghestani; Amir Sabbagh Molahosseini; Yavar Safaei Mehrabani (Sustain. Comput. Informatics Syst., 2022)

DAFA: Dynamic approximate full adders for high area and energy efficiency. - Yavar Safaei Mehrabani; Reza Faghih Mirzaee (Integr., 2024)