Logic Circuit Design Based on MOS-NDR Devices and Circuits Fabricated by CMOS Process. - Kwang-Jow Gan; Dong-Shong Liang; Chung-Chih Hsiao; Shih-Yu Wang; Feng-Chang Chiang; Cher-Shiung Tsai; Yaw-Hwang Chen; Shun-Huo Kuo; Chi-Pin Chen (IWSOC, 2005)

Novel Voltage-Controlled Oscillator Design by MOS-NDR Devices and Circuits. - Dong-Shong Liang; Kwang-Jow Gan; Chung-Chih Hsiao; Cher-Shiung Tsai; Yaw-Hwang Chen; Shih-Yu Wang; Shun-Huo Kuo; Feng-Chang Chiang; Long-Xian Su (IWSOC, 2005)

Four-Valued Memory Circuit Designed by Multiple-Peak MOS-NDR Devices and Circuits. - Dong-Shong Liang; Kwang-Jow Gan; Long-Xian Su; Chi-Pin Chen; Chung-Chih Hsiao; Cher-Shiung Tsai; Yaw-Hwang Chen; Shih-Yu Wang; Shun-Huo Kuo; Feng-Chang Chiang (IWSOC, 2005)

Five-State Logic Using MOS-HBT-NDR Circuit by Standard SiGe BiCMOS Process. - Kwang-Jow Gan; Dong-Shong Liang; Cher-Shiung Tsai; Yaw-Hwang Chen; Chun-Ming Wen (APCCAS, 2006)

Design of AND and NAND Logic Gate Using NDR-BASED Circuit Suitable for CMOS Process. - Dong-Shong Liang; Cheng-Chi Tai; Kwang-Jow Gan; Cher-Shiung Tsai; Yaw-Hwang Chen (APCCAS, 2006)

The Design of MOS-NDR-Based Cellular Neural Network. - Dong-Shong Liang; Yaw-Hwang Chen; Chun-Min Wen; Chun-Da Tu; Kwang-Jow Gan; Cher-Shiung Tsai (IJCNN, 2006)

Multiple-Valued Memory Design by Standard BiCMOS Technique. - Dong-Shong Liang; Kwang-Jow Gan; Jenq-Jong Lu; Cheng-Chi Tai; Cher-Shiung Tsai; Geng-Huang Lan; Yaw-Hwang Chen (CSIE (3), 2009)