The Design and Implementation of OMPit: An OpenMP Compiler Characterized by Logs for Parallel and Work-Sharing. - Qiuming Luo; Ye Cai 001; Chengjian Liu; Chang Kong (PAAP, 2011)

Performance Evaluation of OpenMP Constructs and Kernel Benchmarks on a Loongson-3A Quad-Core SMP System. - Qiuming Luo; Chang Kong; Ye Cai 001; Gang Liu 028 (PDCAT, 2011)

MAP-numa: Access Patterns Used to Characterize the NUMA Memory Access Optimization Techniques and Algorithms. - Qiuming Luo; Chengjian Liu; Chang Kong; Ye Cai 001 (NPC, 2012)

Quantitatively Measuring the Memory Locality Leakage on NUMA Systems Based on Instruction-Based-Sampling. - Qiuming Luo; Chengjian Liu; Chang Kong; Ye Cai 001 (PDCAT, 2012)

Analyzing the Characteristics of Memory Subsystem on Two Different 8-Way NUMA Architectures. - Qiuming Luo; Yuanyuan Zhou; Chang Kong; Guoqiang Liu; Ye Cai 001; Xiaohui Lin 001 (NPC, 2013)

Optimization of Uncore Data Flow on NUMA Platform. - Qiuming Luo; Yuanyuan Zhou; Chang Kong; Mei Wang; Ye Cai 001 (NPC, 2014)

Characteristic Analysis of Operating Systems for Large Scale Hierarchical NUMA System. - Qiuming Luo; Yuanyuan Zhou; Mei Wang; Ye Cai 001 (PAAP, 2014)

Research on Parallel Architecture of OpenCL-Based FPGA. - Yi Zhang; Ye Cai 001; Qiuming Luo (SmartCom, 2017)

Algorithms designed for compressed-gene-data transformation among gene banks with different references. - Qiuming Luo; Chao Guo 004; Yijun Zhang; Ye Cai 001; Gang Liu 028 (BMC Bioinform., 2018)

An Online Face Clustering Algorithm for Face Monitoring and Retrieval in Real-Time Videos. - Ye Cai 001; HaiYang Gan (ISPA/BDCloud/SocialCom/SustainCom, 2019)

FPGA-Based Parallel Multi-Core GZIP Compressor in HDFS. - Haoxin Luo; Ye Cai 001; Qiuming Luo; Rui Mao 001 (PDCAT, 2019)

Towards Developing High Performance RISC-V Processors Using Agile Methodology. - Yinan Xu 001; Zihao Yu; Dan Tang 002; Guokai Chen; Lu Chen; Lingrui Gou; Yue Jin; Qianruo Li; Xin Li; Zuojun Li; Jiawei Lin; Tong Liu; et al. (MICRO, 2022)

Structured DFT Development Approach for Chisel-Based High Performance RISC-V Processors. - Bin Zhang; Ye Cai 001; Zhiheng He; Sen Liang; Wei He (ITC-Asia, 2023)

iEDA: An Open-Source Intelligent Physical Implementation Toolkit and Library. - Xingquan Li; Simin Tao; Zengrong Huang; Shijian Chen; Zhisheng Zeng; Liwei Ni; Zhipeng Huang 009; Chunan Zhuang; Hongxi Wu; Weiguo Li; Xueyan Zhao; He Liu; et al. (CoRR, 2023)

Toward Developing High-Performance RISC-V Processors Using Agile Methodology. - Yinan Xu 001; Zihao Yu; Dan Tang 002; Ye Cai 001; Dandan Huan; Wei He; Ninghui Sun; Yungang Bao (IEEE Micro, 2023)

iEDA: An Open-source infrastructure of EDA. - Xingquan Li; Zengrong Huang; Simin Tao; Zhipeng Huang 009; Chunan Zhuang; Hao Wang; Yifan Li; Yihang Qiu; Guojie Luo; Huawei Li 001; Haihua Shen; Mingyu Chen 001; et al. (ASPDAC, 2024)

Net Resource Allocation: A Desirable Initial Routing Step. - Zhisheng Zeng; Jikang Liu; Zhipeng Huang 009; Ye Cai 001; Biwei Xie; Yungang Bao; Xingquan Li (DAC, 2024)

Parallel AIG Refactoring via Conflict Breaking. - Ye Cai 001; Zonglin Yang; Liwei Ni; Junfeng Liu; Biwei Xie; Xingquan Li (ISCAS, 2024)

Enhancing ASIC Technology Mapping via Parallel Supergate Computing. - Ye Cai 001; Zonglin Yang; Liwei Ni; Biwei Xie; Xingquan Li (CoRR, 2024)

Verilua: An Open Source Versatile Framework for Efficient Hardware Verification and Analysis Using LuaJIT. - Ye Cai 001; Chuyu Zheng; Wei He; Dan Tang 002 (DATE, 2025)

BPTCN: a low-latency branch prediction model based on temporal convolutional networks. - Ye Cai 001; Jinghui Zhong; Guoliang Chen; Hao Liao (J. Supercomput., 2025)