Advanced Multithreading Architecture with Hardware Based Scheduling. - Ye Lu 003; Sakir Sezer; John V. McCanny (FPL, 2010)

TLM2.0 based timing accurate modeling method for complex NoC systems. - Ye Lu 003; Sakir Sezer; John V. McCanny (ISCAS, 2010)

Design and analysis of an advanced static blocked multithreading architecture. - Ye Lu 003; Sakir Sezer; John V. McCanny (SoCC, 2010)

Generic Low-Latency NoC Router Architecture for FPGA Computing Systems. - Ye Lu 003; John V. McCanny; Sakir Sezer (FPL, 2011)

The Impact of Global Routing on the Performance of NoCs in FPGAs. - Ye Lu 003; John V. McCanny; Sakir Sezer (ReConFig, 2011)

Exploring Virtual-Channel architecture in FPGA based Networks-on-Chip. - Ye Lu 003; John V. McCanny; Sakir Sezer (SoCC, 2011)

A Novel Flit Serialization Strategy to Utilize Partially Faulty Links in Networks-on-Chip. - Changlin Chen; Ye Lu 003; Sorin Dan Cotofana (NOCS, 2012)

Design of interlock-free combined allocators for Networks-on-Chip. - Ye Lu 003; Changlin Chen; John V. McCanny; Sakir Sezer (SoCC, 2012)

Networks-on-chip for multiprocessors. - Ye Lu 003 (2012)