A Cross-Debugging Method for Hardware/Software Co-design Environments. - Yehuda Kra (DAC, 1993)

WavePro: Clock-less Wave-Propagated Pipeline Compiler for Low-Power and High-Throughput Computation. - Yehuda Kra; Tzachi Noy; Adam Teman (DATE, 2020)

Physically Aware Affinity-Driven Multiplier Implementation. - Or Maltabashi; Yehuda Kra; Adam Teman (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

WP 2.0: Signoff-Quality Implementation and Validation of Energy-Efficient Clock-Less Wave Propagated Pipelining. - Yehuda Kra; Tzachi Noy; Adam Teman (DATE, 2021)

SerOpt: Transistor Sizing Algorithm and Optimization Utility for Minimizing Soft Error Rate. - Yehuda Kra; Yoav Weizman; Adam Teman (DCIS, 2022)

A RISC-V-based Research Platform for Rapid Design Cycle. - Esteban Garzón; Roman Golman; Odem Harel; Tzachi Noy; Yehuda Kra; Asaf Pollock; Slava Yuzhaninov; Yonatan Shoshan; Yehuda Rudin; Yoav Weizman; Marco Lanuzza; Adam Teman (ISCAS, 2022)

Silicon-Proven Clockless Wave-Propagated Pipelining for High-Throughput, Energy-Efficient Processing. - Yehuda Kra; Adam Teman (ISCAS, 2022)

Selfie5: An Autonomous, Self-Contained Verification Approach for High-Throughput Random Testing of Programmable Processors. - Yehuda Kra; Naama Kra; Adam Teman (DATE, 2024)

Basecalling by Statistical Profiling and Hardware-Accelerated Convolutional Neural Network. - Yehuda Kra; Yehuda Rudin; Alexander Fish; Adam Teman (PRIME, 2024)

HAMSA-DI: A Low-Power Dual-Issue RISC-V Core Targeting Energy-Efficient Embedded Systems. - Yehuda Kra; Yonatan Shoshan; Yehuda Rudin; Adam Teman (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)