T-CAT: Dynamic Cache Allocation for Tiered Memory Systems With Memory Interleaving. - Hwanjun Lee; Seunghak Lee; Yeji Jung; Daehoon Kim (IEEE Comput. Archit. Lett., 2023)

RoPIM: A Processing-in-Memory Architecture for Accelerating Rotary Positional Embedding in Transformer Models. - Yunhyeong Jeon; Minwoo Jang; Hwanjun Lee; Yeji Jung; Jin Jung; Jonggeon Lee; Jinin So; Daehoon Kim (IEEE Comput. Archit. Lett., 2025)