Investigation on the Worst Read Scenario of a ReRAM Crossbar Array. - Yelim Youn; Kwangmin Kim; Jae-Yoon Sim; Hong-June Park; Byungsub Kim (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A Rule-of-thumb Condition to Avoid Large HRS Current in ReRAM Crossbar Array Design. - Yelim Youn; Kwangmin Kim; Byungsub Kim (ISOCC, 2018)

A Fully Integrated, Low-Noise, Cost-Effective Single-Crystal-Oscillator-Based Clock Management IC in 28-nm CMOS. - Jaehong Jung; Seunghyun Oh; Joomyoung Kim; Jinhyeon Lee; Wonkang Kim; Euiyoung Park; Seungyong Bae; Seungjin Kim; Jaehoon Lee 005; Yelim Youn; Yeongcheol Jeong; Sungsik Park; et al. (IEEE J. Solid State Circuits, 2024)