A Data Migration Approach for L1 Cache Design with SRAM and Volatile STT-RAM. - Wei-Kai Cheng; Yen-Heng Ciou (ICS, 2014)

Architecture and data migration methodology for L1 cache design with hybrid SRAM and volatile STT-RAM configuration. - Wei-Kai Cheng; Yen-Heng Ciou; Po-Yuan Shen (Microprocess. Microsystems, 2016)