A Digital Phase-Locked Loop With Background Supply Noise Cancellation. - Yen-Min Tseng; Yu-Chi Yen; Shen-Iuan Liu (VLSI-DAT, 2021)

An Injection-Locked Clock Multiplier With Injection Strength Calibration. - Yen-Min Tseng; Yu-Chi Yen; Shen-Iuan Liu (VLSI-DAT, 2022)