A 0.1-3GHz cell-based fractional-N all digital phase-locked loop using ΔΣ noise-shaped phase detector. - Yao-Chia Liu; Wei-Zen Chen; Mao-Hsuan Chou; Tsung-Hsien Tsai; Yen-Wei Lee; Min-Shueh Yuan (CICC, 2013)

Improved Energy Efficiency for Ferroelectric FET Non-Volatile Memory using Split-Gate Design. - Yen-Wei Lee; Vita Pi-Ho Hu (ISCAS, 2020)

An Improved Traditional Chinese Evaluation Suite for Foundation Model. - Zhi Rui Tam; Ya-Ting Pai; Yen-Wei Lee; Sega Cheng; Hong-Han Shuai (CoRR, 2024)

VisTW: Benchmarking Vision-Language Models for Traditional Chinese in Taiwan. - Zhi Rui Tam; Ya-Ting Pai; Yen-Wei Lee; Yun-Nung Chen (CoRR, 2025)