A 1.8mW 2MHz-BW 66.5dB-SNDR ΔΣ ADC using VCO-based integrators with intrinsic CLA. - Kyoungtae Lee; Yeonam Yoon; Nan Sun 003 (CICC, 2013)

A 10MHz-BW, 5.6mW, 70dB SNDR ΔΣ ADC using VCO-based integrators with intrinsic DEM. - Kyoungtae Lee; Yeonam Yoon; Nan Sun 003 (ISCAS, 2013)

A purely-VCO-based single-loop high-order continuous-time ΣΔ ADC. - Yeonam Yoon; Kyoungtae Lee; Peijun Wang; Nan Sun 003 (ISCAS, 2014)

A 10.5-b ENOB 645 nW 100kS/s SAR ADC with statistical estimation based noise reduction. - Long Chen 004; Xiyuan Tang; Arindam Sanyal; Yeonam Yoon; Jie Cong; Nan Sun 001 (CICC, 2015)

A 0.04-mm2 0.9-mW 71-dB SNDR distributed modular AS ADC with VCO-based integrator and digital DAC calibration. - Yeonam Yoon; Kyoungtae Lee; Sungjin Hong; Xiyuan Tang; Long Chen 004; Nan Sun 001 (CICC, 2015)

A Scaling-Friendly Low-Power Small-Area ΔΣ ADC With VCO-Based Integrator and Intrinsic Mismatch Shaping Capability. - Kyoungtae Lee; Yeonam Yoon; Nan Sun 003 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2015)

A pipelined SAR ADC reusing the comparator as residue amplifier. - Miguel Gandara; Wenjuan Guo; Xiyuan Tang; Long Chen 004; Yeonam Yoon; Nan Sun 001 (CICC, 2017)

A 0.7-V 0.6-µW 100-kS/s Low-Power SAR ADC With Statistical Estimation-Based Noise Reduction. - Long Chen 004; Xiyuan Tang; Arindam Sanyal; Yeonam Yoon; Jie Cong; Nan Sun 001 (IEEE J. Solid State Circuits, 2017)

A 6-bit 0.81mW 700-MS/s SAR ADC with sparkle-code correction, resolution enhancement, and background window width calibration. - Yeonam Yoon; Nan Sun 003 (CICC, 2018)

A 6-bit 0.81-mW 700-MS/s SAR ADC With Sparkle-Code Correction, Resolution Enhancement, and Background Window Width Calibration. - Yeonam Yoon; Nan Sun 003 (IEEE J. Solid State Circuits, 2018)

Advances in Voltage-Controlled-Oscillator-Based ΔΣ ADCs. - Shaolan Li; Arindam Sanyal; Kyoungtae Lee; Yeonam Yoon; Xiyuan Tang; Yi Zhong; Kareem Ragab; Nan Sun 001 (IEICE Trans. Electron., 2019)