Synthesis of Multi-Variable MVL Funtions Using Hybrid Mode CMOS Logic. - Yeong-Jar Chang; Chung-Len Lee (ISMVL, 1994)

A Behavior-Level Fault Model for the Closed-Loop Operational Amplifier. - Yeong-Jar Chang; Chung-Len Lee 001; Jwu E. Chen; Chauchin Su (J. Inf. Sci. Eng., 2000)

Fail Pattern Identification for Memory Built-In Self-Repair. - Rei-Fu Huang; Chin-Lung Su; Cheng-Wen Wu; Shen-Tien Lin; Kun-Lun Luo; Yeong-Jar Chang (Asian Test Symposium, 2004)

MRAM Defect Analysis and Fault Modeli. - Chin-Lung Su; Rei-Fu Huang; Cheng-Wen Wu; Chien-Chung Hung; Ming-Jer Kao; Yeong-Jar Chang; Wen Ching Wu (ITC, 2004)

A Parallel Built-in Diagnostic Scheme for Multiple Embedded Memories. - Li-Ming Denq; Rei-Fu Huang; Cheng-Wen Wu; Yeong-Jar Chang; Wen Ching Wu (MTDT, 2004)

Crosstalk Fault Detection for Interconnection Lines Based on Path Delay Inertia Principle. - Ming Shae Wu; Chung-Len Lee; Yeong-Jar Chang; Wen Ching Wu (Asian Test Symposium, 2005)

A Low-Cost Programmable Memory BIST Design for Multiple Memory Instances. - Chung-Fu Lin; Chia-Fu Huang; De-Chung Lu; Chih-Chiang Hsu; Wen-Tsung Chiu; Yu-Wei Chen; Yeong-Jar Chang (ITC, 2008)

Value assignment of adjustable delay buffers for clock skew minimization in multi-voltage mode designs. - Yu-Shih Su; Wing-Kai Hon; Cheng-Chih Yang; Shih-Chieh Chang; Yeong-Jar Chang (ICCAD, 2009)

On the Design of Power-rail ESD Clamp Circuit with Consideration of Gate Leakage Current in 65-nm Low-voltage CMOS Process. - Ming-Dou Ker; Po-Yen Chiu; Fu-Yi Tsai; Yeong-Jar Chang (ISCAS, 2009)

Clock Skew Minimization in Multi-Voltage Mode Designs Using Adjustable Delay Buffers. - Yu-Shih Su; Wing-Kai Hon; Cheng-Chih Yang; Shih-Chieh Chang; Yeong-Jar Chang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

A fast thermal-aware fixed-outline floorplanning methodology based on analytical models. - Jai-Ming Lin; Tai-Ting Chen; Yen-Fu Chang; Wei-Yi Chang; Ya-Ting Shyu; Yeong-Jar Chang; Juin-Ming Lu (ICCAD, 2018)

Fast Steady-State Thermal Analysis. - Lih-Yih Chiou; Chun-Hao Chang; Liang-Ying Lu; Wei-Hsuan Yang; Yeong-Jar Chang; Juin-Ming Lu (ISOCC, 2018)

Intelligent Policy Selection for GPU Warp Scheduler. - Lih-Yih Chiou; Tsung-Han Yang; Jian-Tang Syu; Che-Pin Chang; Yeong-Jar Chang (AICAS, 2019)

Thermal-Aware Fixed-Outline Floorplanning Using Analytical Models With Thermal-Force Modulation. - Jai-Ming Lin; Tai-Ting Chen; Hao-Yuan Hsieh; Ya-Ting Shyu; Yeong-Jar Chang; Juin-Ming Lu (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Thermal-Aware Floorplanning and TSV-Planning for Mixed-Type Modules in a Fixed-Outline 3-D IC. - Jai-Ming Lin; Wei-Yi Chang; Hao-Yuan Hsieh; Ya-Ting Shyu; Yeong-Jar Chang; Juin-Ming Lu (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Training Classical Neural Networks by Quantum Machine Learning. - Chen-Yu Liu; En-Jui Kuo; Chu-Hsuan Abraham Lin; Sean Chen; Jason Gemsun Young; Yeong-Jar Chang; Min-Hsiu Hsieh (QCE, 2024)

Quantum-Chiplet: A VLSI-Like Methodology for Hierarchical Quantum Design and Verification. - Hao-Yu Lu; Yu-Ting Kao; Yeong-Jar Chang; Jason Gemsun Young; Darsen D. Lu (ISVLSI, 2025)

Mixed-Signal Quantum Circuit Design for Option Pricing Using Design Compiler. - Yu-Ting Kao; Yeong-Jar Chang; Ying-Wei Tseng (CoRR, 2025)

Quantum-Train: rethinking hybrid quantum-classical machine learning in the model compression perspective. - Chen-Yu Liu; En-Jui Kuo; Chu-Hsuan Abraham Lin; Jason Gemsun Young; Yeong-Jar Chang; Min-Hsiu Hsieh; Hsi-Sheng Goan (Quantum Mach. Intell., 2025)