Design strategy for three-dimensional subband filter banks. - Po-Cheng Wu; Liang-Gee Chen; Yeong-Kang Lai; Tsung-Han Tsai 001 (ICIP (1), 1996)

A flexible data-interlacing architecture for full-search block-matching algorithm. - Yeong-Kang Lai; Liang-Gee Chen; Yung-Pin Lee (ASAP, 1997)

A Flexible High-Throughput VLSI Architecture with 2-D Data-Reuse for Full-Search Motion Estimation. - Yeong-Kang Lai; Liang-Gee Chen; Tsung-Han Tsai 001; Po-Cheng Wu (ICIP (2), 1997)

A data-interlacing architecture with two-dimensional data-reuse for full-search block-matching algorithm. - Yeong-Kang Lai; Liang-Gee Chen (IEEE Trans. Circuits Syst. Video Technol., 1998)

A novel VLSI architecture for Lempel-Ziv based data compression. - Yeong-Kang Lai; Kuo-Chen Chen (ISCAS, 2000)

VLSI architecture design and implementation for BLOWFISH block cipher with secure modes of operation. - Yeong-Kang Lai; Yu-Chuan Shu (ISCAS (4), 2001)

A memory efficient motion estimator for three step search block-matching algorithm. - Yeong-Kang Lai (IEEE Trans. Consumer Electron., 2001)

A high data-reuse architecture with double-slice processing for full-search block-matching algorithm. - Yeong-Kang Lai; Lien-Fei Chen (ISCAS (2), 2003)

A cost-effective 2-D discrete cosine transform processor with reconfigurable datapath. - Yeong-Kang Lai; Han-Jen Hsu (ISCAS (2), 2003)

VLSI architecture of the reconfigurable computing engine for digital signal processing applications. - Lien-Fei Chen; Yeong-Kang Lai (ISCAS (2), 2004)

A performance-driven configurable motion estimator for full-search block-matching algorithm. - Yeong-Kang Lai; Lien-Fei Chen (ISCAS (2), 2004)

A novel memoryless AES cipher architecture for networking applications. - Yeong-Kang Lai; Li-Chung Chang; Lien-Fei Chen; Chih-Chung Chou; Chun-Wei Chiu (ISCAS (4), 2004)

Memory analysis and throughput enhancement for cost effective bit-plane coder in JPEG2000 applications. - Lien-Fei Chen; Tai-Lun Huang; Yeong-Kang Lai (ICASSP (5), 2005)

A simple and cost effective video encoder with memory-reducing CAVLC. - Yeong-Kang Lai; Chih-Chung Chou; Yu-Chieh Chung (ISCAS (1), 2005)

A two-way SIMD-based reconfigurable computing architecture for multimedia applications. - Yeong-Kang Lai; Lien-Fei Chen; Jian-Chou Chen; Chun-Wei Chiu (ISCAS (5), 2005)

Analysis and Architecture Design for Memory Efficient Parallel Embedded Block Coding Architecture in JPEG 2000. - Lien-Fei Chen; Tai-Lun Huang; Tzau-Min Chou; Yeong-Kang Lai (ICASSP (3), 2006)

A Cost Effective Interconnection Network for Reconfigurable Computing Processor in Digital Signal Processing Applications. - Yeong-Kang Lai; Lien-Fei Chen; Jian-Chou Chen; Chun-Wei Chiu (IEICE Trans. Electron., 2006)

Analysis and architecture design of multi-transform architecture for H.264/AVC intra frame coder. - Lien-Fei Chen; Kun-Hsing Li; Chong-Yu Huang; Yeong-Kang Lai (ICME, 2008)

Hybrid parallel motion estimation architecture based on fast Pel-subsampling algorithm. - Yeong-Kang Lai; Lien-Fei Chen; Tian-En Hsieh; Shien-Yu Huang (ICME, 2008)

A high-speed 2-D transform architecture with unique kernel for multi-standard video applications. - Chong-Yu Huang; Lien-Fei Chen; Yeong-Kang Lai (ISCAS, 2008)

Model-based early termination scheme for H.264/AVC inter prediction. - Lien-Fei Chen; Shin-Ping Yang; Yeong-Kang Lai (ICASSP, 2009)

Hardware Efficient Coarse-to-fine Fast Algorithm for H.264/AVC Variable Block Size Motion Estimation. - Lien-Fei Chen; Shien-Yu Huang; Chi-Yao Liao; Yeong-Kang Lai (ISCAS, 2009)

A high-performance and memory-efficient VLSI architecture with parallel scanning method for 2-D lifting-based discrete wavelet transform. - Yeong-Kang Lai; Lien-Fei Chen; Yui-Chih Shih (IEEE Trans. Consumer Electron., 2009)

A memory interleaving and interlacing architecture for deblocking filter in H.264/AVC. - Yeong-Kang Lai; Lien-Fei Chen; Wei-Che Chiou (IEEE Trans. Consumer Electron., 2010)

Hybrid parallel motion estimation architecture based on fast top-winners search algorithm. - Yeong-Kang Lai; Lien-Fei Chen; Shien-Yu Huang (IEEE Trans. Consumer Electron., 2010)

A reconfigurable IDCT architecture for universal video decoders. - Yeong-Kang Lai; Yu-Fan Lai (IEEE Trans. Consumer Electron., 2010)

A novel perceptual video coding algorithm and architecture design for H.264/AVC. - Yeong-Kang Lai; Yu-Fan Lai; Cheng-Han Dai (ICME, 2011)

An effective hybrid depth-perception algorithm for 2D-to-3D conversion in 3D display systems. - Yeong-Kang Lai; Yu-Fan Lai; Ying-Chang Chen (ICCE, 2012)

Algorithm and architecture design of sorting-based motion estimation algorithm for wireless video applications. - Yeong-Kang Lai; Yen-Fang Lai; Yu-Fan Lai (ICCE, 2012)

Wide color-gamut improvement with skin protection using content-based analysis for display systems. - Yeong-Kang Lai; Shu-Ming Lee; Yu-Fan Lai (ICCE, 2012)

High-quality view synthesis algorithm and architecture for 2D to 3D conversion. - Yeong-Kang Lai; Yu-Fan Lai; Jung-Wei Lin (ISCAS, 2012)

Cost-effective rasterization using valid screen space region. - Yeong-Kang Lai; Yu-Chieh Chung (ICCE, 2013)

Perceptual video quality assessment for wireless multimedia applications. - Yeong-Kang Lai; Yu-Fan Lai; Cheng-Han Dai; Thomas Schumann (ICCE, 2013)

Hardware implementation for real-time 3D rendering in 2D-to-3D conversion. - Yeong-Kang Lai; Yu-Chieh Chung; Yu-Fan Lai (ISCAS, 2013)

Block based depth map estimation algorithm for 2D-to-3D conversion. - Benjamin Freiling; Thomas Schumann; Yeong-Kang Lai; Yu-Fan Lai (ISCE, 2013)

3-D graphics processor unit with cost-effective rasterization using valid screen space region. - Yeong-Kang Lai; Yu-Chieh Chung (IEEE Trans. Consumer Electron., 2013)

Depth rendering for vehicle collision avoidance applications. - Yeong-Kang Lai; Yu-Chieh Chung; Jian-Wen Li; Chih-Ming Hwang (ICCE-TW, 2014)

Real-time 3D rendering processor for 2D-to-3D conversion of stereoscopic displays. - Yeong-Kang Lai; Yu-Chieh Chung (ICCE, 2014)

Advanced VLSI Design Methodologies for Emerging Industrial Multimedia and Communication Applications. - Yeong-Kang Lai; Yeong-Lin Lai; Thomas Schumann (VLSI Design, 2014)

A shape-perceived object tracking algorithm for intelligent surveillance systems. - Yu-Chieh Chung; Yeong-Kang Lai (ICCE-TW, 2015)

Distance estimation based on disparity analysis for vehicle applications. - Yeong-Kang Lai; Chiu-Ying Ho; Jian-Wen Li; Thomas Schumann (ICCE-TW, 2015)

An efficient and high quality rasterization algorithm and architecture in 3D graphics systems. - Yeong-Kang Lai; Yu-Chieh Chung (ISCAS, 2015)

Cost-effective raster operation with enhanced shared-edge sampling for 3D graphics gaming applications. - Yeong-Kang Lai; Yu-Chieh Chung (ICCE, 2016)

Front moving object detection for car collision avoidance applications. - Yeong-Kang Lai; Yao-Hsien Huang; Chih-Ming Hwang (ICCE, 2016)

Dynamic gamma correction algorithm using content-based analysis for display systems. - Yeong-Kang Lai; Shu-Ming Lee; Jian-Wen Li; Thomas Schumann (ICCE, 2016)

Scalable rasterizer architecture for 3D graphics system. - Yeong-Kang Lai; Yu-Chieh Chung (ISCAS, 2016)

Block based depth map estimation algorithm for 2D-to-3D conversion on FPGA. - Yeong-Kang Lai; Chu-Yin Ho; Benjamin Freiling; Thomas Schumann (ISCAS, 2016)

Vehicle detection for forward collision warning system based on a cascade classifier using adaboost algorithm. - Yeong-Kang Lai; Yu-Hsi Chou; Thomas Schumann (ICCE-Berlin, 2017)

Intelligent Vehicle Collision-Avoidance System with Deep Learning. - Yeong-Kang Lai; Chu-Ying Ho; Yu-Hau Huang; Chuan-Wei Huang; Yi-Xian Kuo; Yu-Chieh Chung (APCCAS, 2018)

Fast Motion Estimation Based on Diamond Refinement Search for High Efficiency Video Coding. - Yeong-Kang Lai; Lee-Sheng Lien (ICCE, 2019)

Locally Adaptive Contrast Enhancement Using a Modified 2D Smooth Histogram. - Yeong-Kang Lai; Shu-Ming Lee (ICCE, 2019)

An Efficient Accelerator for Deep Convolutional Neural Networks. - Yi-Xian Kuo; Yeong-Kang Lai (ICCE-TW, 2020)

FPGA-Based Depth Separable Convolution Neural Network. - Yeong-Kang Lai; Yu-Hao Hwang (ICCE, 2020)

The Influence Measures of Light Intensity on Machine Learning for Semantic Segmentation. - Cheng-Hsien Chen; Yeong-Kang Lai (ISOCC, 2020)

Hardware Generator for Edge Artificial Intelligent Inference System. - Yeong-Kang Lai; Chuan-Wei Huang (ICCE-TW, 2021)

Object Detection Inference System with Deep Learning NVDLA Accelerator. - Yeong-Kang Lai; Chuan-Wei Huang (ICCE-TW, 2022)

Efficient Convolutional Neural Network Accelerator Based on Systolic Array. - Yeong-Kang Lai; Yu-Jen Tsai (ICCE, 2022)

An Efficient Convolutional Neural Network Accelerator. - Yeong-Kang Lai; Zheng-Xun Yeh (ICCE-Taiwan, 2023)

Color Interpolation with Full Resolution for Hybrid RGB-IR CMOS Sensor. - Yeong-Kang Lai; Yao-Hsien Huang; Yeong-Lin Lai (ICCE, 2023)

A Data Encryption System Utilizing Physical Unclonable Functions, Pseudorandom Functions, and Ascon. - Yian Chen; Yichiao Chen; Hongzhe Chen; Yeong-Kang Lai (ICCE-Taiwan, 2024)

An Efficient Convolutional Neural Network Accelerator on FPGA Platform. - Yeong-Kang Lai; Ling-Cheng Huang (ICCE, 2024)

An Efficient Reconfigurable Parameterized Convolutional Neural Network Accelerator on FPGA Platform. - Yeong-Kang Lai; Chien-Hung Lin (ICCE, 2025)

A Cost-Effective Hardware Architecture for ASCON Against DPA Attacks. - Chun-Yen Tsai; Hongchin Lin; Yeong-Kang Lai (ICCE, 2025)