Coupled 7T 1C SRAM based in-memory computing architecture with gain/offset error auto-compensated SAR ADC. - Honggu Kim; Yerim An; Yong Shim (ISLPED, 2024)

8T-SRAM Based Process-In-Memory (PIM) System With Current Mirror for Accurate MAC Operation. - Keun-Yong Chung; Honggu Kim; Yerim An; Kiho Seong; Dong-Hyun Shin; Kwang-Hyun Baek; Yong Shim (IEEE Access, 2024)

Union SRAM: PVT Variation Auto-Compensated, Bit Precision Configurable Current Mode 8T SRAM in Memory MAC Macro. - Honggu Kim; Yerim An; Ryunyeong Kim; Sunyoung Kim; Yong Shim (IEEE Access, 2024)

Dual-Mode 2T1C DRAM Process-In-Memory Architecture for Boolean and MAC Operations. - Yerim An; Honggu Kim; Dongjun Son; Hakrae Yu; Yong Shim (IEEE Access, 2025)

All Stochastic-Spiking Neural Network (AS-SNN): Noise Induced Spike Pulse Generator for Input and Output Neurons With Resistive Synaptic Array. - Honggu Kim; Yerim An; Minchul Kim; Gyeong-Chan Heo; Yong Shim (IEEE Trans. Circuits Syst. II Express Briefs, 2025)