Reconfigurable RTD-based circuit elements of complete logic functionality. - Yexin Zheng; Chao Huang (ASP-DAC, 2008)

SAT-based equivalence checking of threshold logic designs for nanotechnologies. - Yexin Zheng; Michael S. Hsiao; Chao Huang (ACM Great Lakes Symposium on VLSI, 2008)

A novel Toffoli network synthesis algorithm for reversible logic. - Yexin Zheng; Chao Huang (ASP-DAC, 2009)

Defect-aware logic mapping for nanowire-based programmable logic arrays via satisfiability. - Yexin Zheng; Chao Huang (DATE, 2009)

Reversible logic synthesis through ant colony optimization. - Min Li 013; Yexin Zheng; Michael S. Hsiao; Chao Huang (DATE, 2010)