sBWT: memory efficient implementation of the hardware-acceleration-friendly Schindler transform for the fast biological sequence mapping. - Chia-Hua Chang; Min-Te Chou; Yi-Chung Wu; Ting-Wei Hong; Yun-Lung Li; Chia-Hsiang Yang; Jui-Hung Hung (Bioinform., 2016)

Comparative study of singing voice detection methods. - Shingchern D. You; Yi-Chung Wu; Shih-Hsien Peng (Multim. Tools Appl., 2016)

Integration of energy-recycling logic and wireless power transfer for ultra-low-power implantables. - Hsin-Tzu Lin; Yi-Chung Wu; Ping-Hsuan Hsieh; Chia-Hsiang Yang (ISCAS, 2017)

14.8 A 135mW fully integrated data processor for next-generation sequencing. - Yi-Chung Wu; Jui-Hung Hung; Chia-Hsiang Yang (ISSCC, 2017)

A 135-mW Fully Integrated Data Processor for Next-Generation Sequencing. - Yi-Chung Wu; Chia-Hua Chang; Jui-Hung Hung; Chia-Hsiang Yang (IEEE Trans. Biomed. Circuits Syst., 2017)

A 12.6MW 573-2, 901KS/S Reconfigurable Processor for Reconstruction of Compressively-Sensed Phvsiological Signals. - Yu-Zhe Wang; Yao-Pin Wang; Yi-Chung Wu; Chia-Hsiang Yang (VLSI Circuits, 2018)

A 2.25 TOPS/W Fully-Integrated Deep CNN Learning Processor with On-Chip Training. - Cheng-Hsun Lu; Yi-Chung Wu; Chia-Hsiang Yang (A-SSCC, 2019)

A 12.6 mW, 573-2901 kS/s Reconfigurable Processor for Reconstruction of Compressively Sensed Physiological Signals. - Yu-Zhe Wang; Yao-Pin Wang; Yi-Chung Wu; Chia-Hsiang Yang (IEEE J. Solid State Circuits, 2019)

Design and In Vivo Verification of a CMOS Bone-Guided Cochlear Implant Microsystem. - Xin-Hong Qian; Yi-Chung Wu; Tzu-Yi Yang; Cheng-Hsiang Cheng; Hsing-Chien Chu; Wan-Hsueh Cheng; Ting-Yang Yen; Tzu-Han Lin; Yung-Jen Lin; Yu-Chi Lee; Jia-Heng Chang; Shih-Ting Lin; et al. (IEEE Trans. Biomed. Eng., 2019)

21.1 A Fully Integrated Genetic Variant Discovery SoC for Next-Generation Sequencing. - Yi-Chung Wu; Yen-Lung Chen; Chung-Hsuan Yang; Chao-Hsi Lee; Chao-Yang Yu; Nian-Shyang Chang; Ling-Chien Chen; Jia-Rong Chang; Chun-Pin Lin; Hung-Lieh Chen; Chi-Shi Chen; Jui-Hung Hung; et al. (ISSCC, 2020)

A 1.96 Gb/s Massive MU-MIMO Detector for Next-Generation Cellular Systems. - Chi-Chih Wen; Yu-Chi Lee; Yi-Chung Wu; Chen-Chien Kao; Chia-Hsiang Yang (VLSI Circuits, 2020)

A Generic Framework for Fourier-Domain Optical Coherence Tomography Imaging: Software Architecture and Hardware Implementations. - Yin-Peng Huang; Ting-Yen Tsai; Ting-Hao Chen; Chuan-Bor Chueh; You-Nan Tsai; Yu-Wei Chang; Yi-Chung Wu; Hung-Wen Chen; Meng-Tsan Tsai; Yi-Ping Hung; Hsiang-Chieh Lee (IEEE Access, 2020)

A 975-mW Fully Integrated Genetic Variant Discovery System-on-Chip in 28 nm for Next-Generation Sequencing. - Yi-Chung Wu; Yen-Lung Chen; Chung-Hsuan Yang; Chao-Hsi Lee; Chao-Yang Yu; Nian-Shyang Chang; Ling-Chien Chen; Jia-Rong Chang; Chun-Pin Lin; Hung-Lieh Chen; Chi-Shi Chen; Jui-Hung Hung; et al. (IEEE J. Solid State Circuits, 2021)

A 44.3mW 62.4fps Hyperspectral Image Processor for MAV Remote Sensing. - Yu-Chen Lo; Yi-Chung Wu; Chia-Hsiang Yang (VLSI Technology and Circuits, 2022)

Achieving Accurate Automatic Sleep Apnea/Hypopnea Syndrome Assessment Using Nasal Pressure Signal. - Ying-Sheng Lin; Yi-Pao Wu; Yi-Chung Wu; Pei-Lin Lee; Chia-Hsiang Yang (IEEE J. Biomed. Health Informatics, 2022)

A Fully Integrated End-to-End Genome Analysis Accelerator for Next-Generation Sequencing. - Yen-Lung Chen; Chung-Hsuan Yang; Yi-Chung Wu; Chao-Hsi Lee; Wen-Ching Chen; Liang-Yi Lin; Nian-Shyang Chang; Chun-Pin Lin; Chi-Shi Chen; Jui-Hung Hung; Chia-Hsiang Yang (ISSCC, 2023)

An FM-Index Based High-Throughput Memory-Efficient FPGA Accelerator for Paired-End Short-Read Mapping. - Chung-Hsuan Yang; Yi-Chung Wu; Yen-Lung Chen; Chao-Hsi Lee; Jui-Hung Hung; Chia-Hsiang Yang (IEEE Trans. Biomed. Circuits Syst., 2023)

A 40-nm 6.75 TOPS/W Quantization-Aware NN Processor for High-Energy-Efficiency Image Recognition. - Jun-Wei Yu; Jen-Chieh Cheng; Jia-You Yu; Shih-Yu Pan; Yi-Chung Wu (ISCAS, 2025)

A 44.3-mW 62.4-fps Hyperspectral Image Processor for Spectral Unmixing in MAV Remote Sensing. - Yu-Chen Lo; Yi-Chung Wu; Chia-Hsiang Yang (IEEE J. Solid State Circuits, 2025)