A high throughput 2-dimensional DCT/IDCT architecture for real-time image and video system. - Jen-Shiun Chiang; Yi-Fang Chiu; Teng-Hung Chang (ICECS, 2001)

A Scalable Power Modeling Approach for Embedded Memory Using LIB Format. - Wen-Tsan Hsieh; Chi-Chia Yu; Chien-Nan Jimmy Liu; Yi-Fang Chiu (PATMOS, 2006)

An Efficient Approach with Scaling Capability to Improve Existing Memory Power Model. - Wen-Tsan Hsieh; Chi-Chia Yu; Chien-Nan Jimmy Liu; Yi-Fang Chiu (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

Assessing e-learning 2.0 system success. - Hei-Chia Wang; Yi-Fang Chiu (Comput. Educ., 2011)

Separate Clock Network Voltage for Correcting Random Errors in ULV Clocked Storage Cells. - Shien-Chun Luo; Kuo-Chiang Chang; Ming-Pin Chen; Ching-Ji Huang; Yi-Fang Chiu; Po-Hsun Chen; Liang-Chia Cheng; Chih-Wei Liu; Yuan-Hua Chu (IEEE Trans. Circuits Syst. II Express Briefs, 2014)