Heuristic algorithm for the resource constrained scheduling problem during high-level synthesis. - Yi-Hsin Wu; Cheng-Juei Yu; Sheng-De Wang (IET Comput. Digit. Tech., 2009)

An in-place search algorithm for the resource constrained scheduling problem during high-level synthesis. - Cheng-Juei Yu; Yi-Hsin Wu; Sheng-De Wang (ACM Trans. Design Autom. Electr. Syst., 2010)

Analyzing and Classifying the Yami Emotion Phrases Using Ontological Structure and Computation. - Meng-Chien Yang; D. Victoria Rau; Yi-Hsin Wu (IALP, 2012)

Interfacial reaction and mechanical evaluation in multi-level assembly joints with ENEPIG under bump metallization via drop and high speed impact test. - Hsiu-Min Lin; Cheng-Ying Ho; Wen-Lin Chen; Yi-Hsin Wu; De-Hui Wang; Jun-Ren Lin; Yu-Hui Wu; Huei-Cheng Hong; Zhi-Wei Lin; Jenq-Gong Duh (Microelectron. Reliab., 2015)

On recommendation of graph mining algorithms for different data. - Chih-Hua Tai; Tsung-Han Lee; Sheng-Hao Chiang; Jui-Yi Tsai; De-Nian Yang; Yi-Hsin Wu; Ya-Huei Chan (BigComp, 2016)

Streaming analytics processing in manufacturing performance monitoring and prediction. - Yi-Hsin Wu; Sheng-De Wang; Li-Jung Chen; Cheng-Juei Yu (IEEE BigData, 2017)

An Approach to the Design of Specific Hardware Circuits from C Programs. - Cheng-Juei Yu; Yi-Hsin Wu; Sheng-De Wang (J. Inf. Sci. Eng., 2018)

Using Partial Combination Models to Improve Prediction Quality and Transparency in Mixed Datasets. - Yi-Hsin Wu; Yu-Hsin Chang; Yin-Jing Tien; Cheng-Juei Yu; Sheng-De Wang; Cheng-Hung Wu (IEEE Access, 2020)

Data-driven Scheduling for High-mix and Low-volume Production in Semiconductor Assembly and Testing. - Christian John Immanuel S. Boydon; Yi-Hsin Wu; Cheng-Hung Wu (CASE, 2021)

Detecting and Scoring Equipment Faults in Real Time During Semiconductor Test Processes. - Yi-Hsin Wu; Jui-Yu Huang; Yi-Chun Yao; Yin-Jing Tien; Cheng-Juei Yu; Sheng-De Wang (IEEE Des. Test, 2021)