A 1V 10-bit 500KS/s energy-efficient SAR ADC using Master-Slave DAC technique in 180nm CMOS. - Yi-Long Yu; Fu-Chen Huang; Chorng-Kuang Wang (VLSI-DAT, 2014)

A Two-Step ADC With Statistical Calibration. - Yi-Long Yu; Paul J. Hurst; Bernard C. Levy; Stephen H. Lewis (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)