Deconstructing mobile commerce service with continuance intention. - Yi-Min Lin; Dong-Her Shih (Int. J. Mob. Commun., 2008)

An improved soft BCH decoder with one extra error compensation. - Yi-Min Lin; Hsie-Chia Chang; Chen-Yi Lee (ISCAS, 2010)

A hybrid forecast marketing timing model based on probabilistic neural network, rough set and C4.5. - Jao-Hong Cheng; Huei-Ping Chen; Yi-Min Lin (Expert Syst. Appl., 2010)

A 26.9 K 314.5 Mb/s Soft (32400, 32208) BCH Decoder Chip for DVB-S2 System. - Yi-Min Lin; Chih-Lung Chen; Hsie-Chia Chang; Chen-Yi Lee (IEEE J. Solid State Circuits, 2010)

A MPCN-Based Parallel Architecture in BCH Decoders for nand Flash Memory Devices. - Yi-Min Lin; Chi-Heng Yang; Chih-Hsiang Hsu; Hsie-Chia Chang; Chen-Yi Lee (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

A fully parallel BCH codec with double error correcting capability for NOR flash applications. - Chia-Ching Chu; Yi-Min Lin; Chi-Heng Yang; Hsie-Chia Chang (ICASSP, 2012)

Improved High Code-Rate Soft BCH Decoder Architectures With One Extra Error Compensation. - Yi-Min Lin; Hsie-Chia Chang; Chen-Yi Lee (IEEE Trans. Very Large Scale Integr. Syst., 2013)

A 2.56 Gb/s Soft RS (255, 239) Decoder Chip for Optical Communication Systems. - Yi-Min Lin; Chih-Hsiang Hsu; Hsie-Chia Chang; Chen-Yi Lee (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

An MPCN-Based BCH Codec Architecture With Arbitrary Error Correcting Capability. - Chi-Heng Yang; Yi-Min Lin; Hsie-Chia Chang; Chen-Yi Lee (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Bots can Snoop: Uncovering and Mitigating Privacy Risks of Bots in Group Chats. - Kai-Hsiang Chou; Yi-Min Lin; Yi-An Wang; Jonathan Weiping Li; Tiffany Hyun-Jin Kim; Hsu-Chun Hsiao (CoRR, 2024)