Compiler Analysis and Supports for Leakage Power Reduction on Microprocessors. - Yi-Ping You; Chingren Lee; Jenq Kuen Lee (LCPC, 2002)

Power-Aware Scheduling for Parallel Security Processors with Analytical Models. - Yung-Chia Lin; Yi-Ping You; Chung-Wen Huang; Jenq Kuen Lee; Wei-Kuan Shih; TingTing Hwang (LCPC, 2004)

Low-power techniques for network security processors. - Yi-Ping You; Chun-Yen Tseng; Yu-Hui Huang; Po-Chiun Huang; TingTing Hwang; Sheng-Yu Hsu (ASP-DAC, 2005)

A sink-n-hoist framework for leakage power reduction. - Yi-Ping You; Chung-Wen Huang; Jenq Kuen Lee (EMSOFT, 2005)

Compiler Supports and Optimizations for PAC VLIW DSP Processors. - Yung-Chia Lin; Chung-Lin Tang; Chung-Ju Wu; Ming-Yu Hung; Yi-Ping You; Ya-Chiao Moo; Sheng-Yuan Chen; Jenq Kuen Lee (LCPC, 2005)

Integrating Compiler and System Toolkit Flow for Embedded VLIW DSP Processors. - Chi Wu; Kun-Yuan Hsieh; Yung-Chia Lin; Chung-Ju Wu; Wen-Li Shih; Shih-Chang Chen; Chung-Kai Chen; Chien-Ching Huang; Yi-Ping You; Jenq Kuen Lee (RTCSA, 2006)

Compilers for leakage power reduction. - Yi-Ping You; Chingren Lee; Jenq Kuen Lee (ACM Trans. Design Autom. Electr. Syst., 2006)

Enabling compiler flow for embedded VLIW DSP processors with distributed register files. - Chung-Kai Chen; Ling-Hua Tseng; Shih-Chang Chen; Young-Jia Lin; Yi-Ping You; Chia-Han Lu; Jenq Kuen Lee (LCTES, 2007)

PALF: compiler supports for irregular register files in clustered VLIW DSP processors. - Yung-Chia Lin; Yi-Ping You; Jenq Kuen Lee (Concurr. Comput. Pract. Exp., 2007)

Energy-aware scheduling and simulation methodologies for parallel security processors with multiple voltage domains. - Yung-Chia Lin; Yi-Ping You; Chung-Wen Huang; Jenq Kuen Lee; Wei-Kuan Shih; TingTing Hwang (J. Supercomput., 2007)

Compilation for compact power-gating controls. - Yi-Ping You; Chung-Wen Huang; Jenq Kuen Lee (ACM Trans. Design Autom. Electr. Syst., 2007)

Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores. - Yung-Chia Lin; Chia-Han Lu; Chung-Ju Wu; Chung-Lin Tang; Yi-Ping You; Ya-Chiao Moo; Jenq Kuen Lee (J. Signal Process. Syst., 2008)

LC-GRFA: global register file assignment with local consciousness for VLIW DSP processors with non-uniform register files. - Chia-Han Lu; Yung-Chia Lin; Yi-Ping You; Jenq Kuen Lee (Concurr. Comput. Pract. Exp., 2009)

Energy-aware code motion for GPU shader processors. - Yi-Ping You; Shen-Hong Wang (ACM Trans. Embed. Comput. Syst., 2013)

Enabling OpenCL support for GPGPU in Kernel-based Virtual Machine. - Tsan-Rong Tien; Yi-Ping You (Softw. Pract. Exp., 2014)

Compiler Optimization for Reducing Leakage Power in Multithread BSP Programs. - Wen-Li Shih; Yi-Ping You; Chung-Wen Huang; Jenq Kuen Lee (ACM Trans. Design Autom. Electr. Syst., 2014)

Vector-aware register allocation for GPU shader processors. - Yi-Ping You; Szu-Chieh Chen (CASES, 2015)

VirtCL: a framework for OpenCL device abstraction and management. - Yi-Ping You; Hen-Jung Wu; Yeh-Ning Tsai; Yen-Ting Chao (PPoPP, 2015)

A static region-based compiler for the Dalvik virtual machine. - Yi-Ping You; Jian-Ru Chen (Softw. Pract. Exp., 2016)

VecRA: A Vector-Aware Register Allocator for GPU Shader Processors. - Yi-Ping You; Szu-Chien Chen (ACM Trans. Embed. Comput. Syst., 2016)

Enabling OpenCL Preemptive Multitasking Using Software Checkpointing. - Ming-Tsung Chiu; Yi-Ping You (ICPP Workshops, 2018)

Translating AArch64 Floating-Point Instruction Set to the x86-64 Platform. - Yi-Ping You; Tsung-Chun Lin; Wuu Yang (ICPP Workshops, 2019)

CLPKM: A checkpoint-based preemptive multitasking framework for OpenCL kernels. - Ming-Tsung Chiu; Yi-Ping You (J. Syst. Archit., 2019)

Structured Concurrency: A Review. - Yi-An Chen; Yi-Ping You (ICPP Workshops, 2022)

Offworker: An Offloading Framework for Parallel Web Applications. - An-Chi Liu; Yi-Ping You (WISE, 2022)

Profile-guided optimisation for indirect branches in a binary translator. - Jyun-Siang Huang; Wuu Yang; Yi-Ping You (Connect. Sci., 2022)

Reduced O3 subsequence labelling: a stepping stone towards optimisation sequence prediction. - Yi-Ping You; Yi-Chiao Su (Connect. Sci., 2022)

Mapping-Free GPU Offloading in OpenMP Using Unified Memory. - Jia-Sian Hong; Yi-Ping You (ICPP Workshops, 2023)

DLOOPT: An Optimization Assistant on AutoTVM for Deep Learning Operators. - Yu-Sheng Hsieh; Yi-Ping You (J. Signal Process. Syst., 2023)

Interference-Aware Function Inlining for Code Size Reduction. - Hsuan Chang; Yi-Ping You (ICPP Workshops, 2024)

Support of MISRA C++ Analyzer for Reliability of Embedded Systems. - Che-Chia Lin; Wei-Hsu Chu; Chia-Hsuan Chang; Hui-Hsin Liao; Chun-Chieh Yang; Jenq-Kuen Lee; Yi-Ping You; Tien-Yuan Hsieh (ACM Trans. Cyber Phys. Syst., 2025)