Design of Concurrent Error-Detectable VLSI-Based Array Dividers. - Thou-Ho Chen; Liang-Gee Chen; Yi-Shing Chang (ICCD, 1992)

Analysis of Ground Bounce in Deep Sub-Micron Circuits. - Yi-Shing Chang; Sandeep K. Gupta 001; Melvin A. Breuer (VTS, 1997)

Test Generation for Ground Bounce in Internal Logic Circuitry. - Yi-Shing Chang; Sandeep K. Gupta 001; Melvin A. Breuer (VTS, 1999)

Test Generation for Maximizing Ground Bounce for Internal Circuitry with Reconvergent Fan-out. - Yi-Shing Chang; Sandeep K. Gupta 001; Melvin A. Breuer (VTS, 2001)

On Modeling Cross-Talk Faults. - Sujit T. Zachariah; Yi-Shing Chang; Sandip Kundu; Chandra Tirumurti (DATE, 2003)

Test Generation for Maximizing Ground Bounce Considering Circuit Delay. - Yi-Shing Chang; Sandeep K. Gupta 001; Melvin A. Breuer (VTS, 2003)

A Modeling Approach for Addressing Power Supply Switching Noise Related Failures of Integrated Circuit. - Chandra Tirumurti; Sandip Kundu; Susmita Sur-Kolay; Yi-Shing Chang (DATE, 2004)

Experimental Evaluation of Bridge Patterns for a High Performance Microprocessor. - Sreejit Chakravarty; Yi-Shing Chang; Hiep Hoang; Sridhar Jayaraman; Silvio Picano; Cheryl Prunty; Eric W. Savage; Rehan Sheikh; Eric N. Tran; Khen Wee (VTS, 2005)

Transition Tests for High Performance Microprocessors. - Yi-Shing Chang; Sreejit Chakravarty; Hiep Hoang; Nick Thorpe; Khen Wee (VTS, 2005)

On modeling crosstalk faults. - Sandip Kundu; Sujit T. Zachariah; Yi-Shing Chang; Chandra Tirumurti (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

An Approach to Minimizing Functional Constraints. - Abhijit Jas; Yi-Shing Chang; Sreejit Chakravarty (DFT, 2006)

A Study of Implication Based Pseudo Functional Testing. - Manan Syal; Kameshwar Chandrasekar; Vishnu C. Vimjam; Michael S. Hsiao; Yi-Shing Chang; Sreejit Chakravarty (ITC, 2006)

Efficient Selection of Observation Points for Functional Tests. - Jian Kang; Sharad C. Seth; Yi-Shing Chang; Vijay Gangaram (ISQED, 2008)

On Accelerating Path Delay Fault Simulation of Long Test Sequences. - I-De Huang; Yi-Shing Chang; Suriyaprakash Natarajan; Ramesh Sharma; Sandeep K. Gupta 001 (ITC, 2008)

An Industrial Case Study of Sticky Path-Delay Faults. - I-De Huang; Yi-Shing Chang; Sandeep K. Gupta 001; Sreejit Chakravarty (VTS, 2008)

A Methodology for Handling Complex Functional Constraints for Large Industrial Designs. - Abhijit Jas; Yi-Shing Chang; Sreejit Chakravarty (J. Electron. Test., 2008)

A Comprehensive Electro-Optical Model for Silicon Photonic Switches. - Xuanqi Chen; Zhifei Wang; Yi-Shing Chang; Jiang Xu 001; Peng Yang 003; Zhehui Wang; Luan H. K. Duong (ISVLSI, 2018)

Crosstalk Noise Reduction Through Adaptive Power Control in Inter/Intra-Chip Optical Networks. - Luan H. K. Duong; Peng Yang 003; Zhifei Wang; Yi-Shing Chang; Jiang Xu 001; Zhehui Wang; Xuanqi Chen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Modeling and Analysis of Optical Modulators Based on Free-Carrier Plasma Dispersion Effect. - Xuanqi Chen; Zhifei Wang; Yi-Shing Chang; Jiang Xu 001; Jun Feng 008; Peng Yang 003; Zhehui Wang; Luan H. K. Duong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

CAMON: Low-Cost Silicon Photonic Chiplet for Manycore Processors. - Zhehui Wang; Zhifei Wang; Jiang Xu 001; Yi-Shing Chang; Jun Feng 008; Xuanqi Chen; Shixi Chen; Jiaxu Zhang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

A Cross-Layer Optimization Framework for Integrated Optical Switches in Data Centers. - Zhifei Wang; Peng Yang 003; Yi-Shing Chang; Jiang Xu 001; Xuanqi Chen; Zhehui Wang; Jun Feng 008 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Multidomain Inter/Intrachip Silicon Photonic Networks for Energy-Efficient Rack-Scale Computing Systems. - Peng Yang 003; Zhehui Wang; Zhifei Wang; Jiang Xu 001; Yi-Shing Chang; Xuanqi Chen; Rafael K. V. Maeda; Jun Feng 008 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)