Yi Wang

According to our database1, Yi Wang authored at least 75 papers between 2009 and 2019.

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Bibliography

2019
Exploiting Parallelism for CNN Applications on 3D Stacked Processing-In-Memory Architecture.
IEEE Trans. Parallel Distrib. Syst., 2019

A Temperature-Aware Reliability Enhancement Strategy for 3-D Charge-Trap Flash Memory.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2019

A Thermal-Aware Physical Space Reallocation for Open-Channel SSD With 3-D Flash Memory.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2019

Towards Cross-Platform Inference on Edge Devices with Emerging Neuromorphic Architecture.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

PATCH: Process-Variation-Resilient Space Allocation for Open-Channel SSD with 3D Flash.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Towards Memory-Efficient Allocation of CNNs on Processing-in-Memory Architecture.
IEEE Trans. Parallel Distrib. Syst., 2018

Optimally Removing Synchronization Overhead for CNNs in Three-Dimensional Neuromorphic Architecture.
IEEE Trans. Industrial Electronics, 2018

A reliability enhanced video storage architecture in hybrid SLC/MLC NAND flash memory.
Journal of Systems Architecture - Embedded Systems Design, 2018

A Reliable Video Storage Architecture in Hybrid SLC/MLC Nand Flash.
Proceedings of the 2018 IEEE International Conference on Acoustics, 2018

2017
Durable Address Translation in PCM-Based Flash Storage Systems.
IEEE Trans. Parallel Distrib. Syst., 2017

P-Alloc: Process-Variation Tolerant Reliability Management for 3D Charge-Trapping Flash Memory.
ACM Trans. Embedded Comput. Syst., 2017

vFlash: Virtualized Flash for Optimizing the I/O Performance in Mobile Devices.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017

A Block-Level Log-Block Management Scheme for MLC NAND Flash Memory Storage Systems.
IEEE Trans. Computers, 2017

Heating Dispersal for Self-Healing NAND Flash Memory.
IEEE Trans. Computers, 2017

Virtual duplication and mapping prefetching for emerging storage primitives in NAND flash memory storage systems.
Microprocessors and Microsystems - Embedded Hardware Design, 2017

Fine grained, direct access file system support for storage class memory.
Journal of Systems Architecture - Embedded Systems Design, 2017

Towards memory-efficient processing-in-memory architecture for convolutional neural networks.
Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, 2017

Online Robust Image Alignment via Subspace Learning from Gradient Orientations.
Proceedings of the IEEE International Conference on Computer Vision, 2017

Exploiting Parallelism for Convolutional Connections in Processing-In-Memory Architecture.
Proceedings of the 54th Annual Design Automation Conference, 2017

Temperature-aware data allocation strategy for 3D charge-trap flash memory.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
An Adaptive Demand-Based Caching Mechanism for NAND Flash Memory Storage Systems.
ACM Trans. Design Autom. Electr. Syst., 2016

A Real-Time Flash Translation Layer for NAND Flash Memory Storage Systems.
IEEE Trans. Multi-Scale Computing Systems, 2016

Image-Content-Aware I/O Optimization for Mobile Virtualization.
ACM Trans. Embedded Comput. Syst., 2016

An Endurance-Aware Metadata Allocation Strategy for MLC NAND Flash Memory Storage Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

Energy-aware assignment and scheduling for hybrid main memory in embedded systems.
Computing, 2016

A Virtual Communication Strategy for Smart Photovoltaic Generation Systems.
Proceedings of the Smart Computing and Communication, 2016

2015
A Scale Self-Adaptive Tracking Method Based on Moment Invariants.
Signal Processing Systems, 2015

Lazy-RTGC: A Real-Time Lazy Garbage Collection Mechanism with Jointly Optimizing Average and Worst Performance for NAND Flash Memory Storage Systems.
ACM Trans. Design Autom. Electr. Syst., 2015

Towards Write-Activity-Aware Page Table Management for Non-volatile Main Memories.
ACM Trans. Embedded Comput. Syst., 2015

Temperature-Aware Data Allocation for Embedded Systems with Cache and Scratchpad Memory.
ACM Trans. Embedded Comput. Syst., 2015

On-Demand Block-Level Address Mapping in Large-Scale NAND Flash Storage Systems.
IEEE Trans. Computers, 2015

Optimizing deterministic garbage collection in NAND flash storage systems.
Proceedings of the 21st IEEE Real-Time and Embedded Technology and Applications Symposium, 2015

File system-independent block device support for storage class memory.
Proceedings of the 2015 IEEE Conference on Computer Communications Workshops, 2015

SmartBackup: An Efficient and Reliable Backup Strategy for Solid State Drives with Backup Capacitors.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

Virtual Machine Image Content Aware I/O Optimization for Mobile Virtualization.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

A Garbage Collection Aware Stripping method for Solid-State Drives.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

Unified non-volatile memory and NAND flash memory architecture in smartphones.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
Loop Transforming for Reducing Data Alignment on Multi-Core SIMD Processors.
Signal Processing Systems, 2014

A Reliability Enhanced Address Mapping Strategy for Three-Dimensional (3-D) NAND Flash Memory.
IEEE Trans. VLSI Syst., 2014

Memory-Aware Task Scheduling with Communication Overhead Minimization for Streaming Applications on Bus-Based Multiprocessor System-on-Chips.
IEEE Trans. Parallel Distrib. Syst., 2014

A Reliability-Aware Address Mapping Strategy for NAND Flash Memory Storage Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2014

Application-Specific Wear Leveling for Extending Lifetime of Phase Change Memory in Embedded Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2014

Loop scheduling with memory access reduction subject to register constraints for DSP applications.
Softw., Pract. Exper., 2014

Analysis of worst-case backlog bounds for Networks-on-Chip.
Journal of Systems Architecture - Embedded Systems Design, 2014

Virtual-machine metadata optimization for I/O traffic reduction in mobile virtualization.
Proceedings of the IEEE Non-Volatile Memory Systems and Applications Symposium, 2014

Deterministic Crash Recovery for NAND Flash Based Storage Systems.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Optimally Removing Intercore Communication Overhead for Streaming Applications on MPSoCs.
IEEE Trans. Computers, 2013

Data-assemblage: a translation-page-aware data block allocation strategy for flash-based solid state drives.
Design Autom. for Emb. Sys., 2013

Thermal-Aware On-Chip Memory Architecture Exploration.
Proceedings of the 12th IEEE International Conference on Trust, 2013

SolarTune: Real-time scheduling with load tuning for solar energy powered multicore systems.
Proceedings of the 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013

FTL2: a hybrid flash translation layer with logging for write reduction in flash memory.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2013

BLog: block-level log-block management for NAND flash memorystorage systems.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2013

DHeating: Dispersed heating repair for self-healing NAND flash memory.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013

Optimizing translation information management in NAND flash memory storage systems.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

Curling-PCM: Application-specific wear leveling for phase change memory based embedded systems.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
A Space Reuse Strategy for Flash Translation Layers in SLC NAND Flash Memory Storage Systems.
IEEE Trans. VLSI Syst., 2012

Optimally Maximizing Iteration-Level Loop Parallelism.
IEEE Trans. Parallel Distrib. Syst., 2012

Staying-alive path planning with energy optimization for mobile robots.
Expert Syst. Appl., 2012

Real-Time Flash Translation Layer for NAND Flash Memory Storage Systems.
Proceedings of the 2012 IEEE 18th Real Time and Embedded Technology and Applications Symposium, 2012

3D-FlashMap: A physical-location-aware block mapping strategy for 3D NAND flash memory.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

A block-level flash memory management scheme for reducing write activities in PCM-based embedded systems.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Meta-Cure: a reliability enhancement strategy for metadata in NAND flash memory storage systems.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011
Overhead-aware energy optimization for real-time streaming applications on multiprocessor System-on-Chip.
ACM Trans. Design Autom. Electr. Syst., 2011

On Improving Real-Time Interrupt Latencies of Hybrid Operating Systems with Two-Level Hardware Interrupts.
IEEE Trans. Computers, 2011

PCM-FTL: A Write-Activity-Aware NAND Flash Memory Management Scheme for PCM-Based Embedded Systems.
Proceedings of the 32nd IEEE Real-Time Systems Symposium, 2011

A Two-Level Caching Mechanism for Demand-Based Page-Level Address Mapping in NAND Flash Memory Storage Systems.
Proceedings of the 17th IEEE Real-Time and Embedded Technology and Applications Symposium, 2011

An endurance-enhanced Flash Translation Layer via reuse for NAND flash memory storage systems.
Proceedings of the Design, Automation and Test in Europe, 2011

MNFTL: an efficient flash translation layer for MLC NAND flash memory storage systems.
Proceedings of the 48th Design Automation Conference, 2011

2010
Compiler-assisted leakage-aware loop scheduling for embedded VLIW DSP processors.
Journal of Systems and Software, 2010

Memory-Aware Optimal Scheduling with Communication Overhead Minimization for Streaming Applications on Chip Multiprocessors.
Proceedings of the 31st IEEE Real-Time Systems Symposium, 2010

Optimal Task Scheduling by Removing Inter-Core Communication Overhead for Streaming Applications on MPSoC.
Proceedings of the 16th IEEE Real-Time and Embedded Technology and Applications Symposium, 2010

RNFTL: a reuse-aware NAND flash translation layer for flash memory.
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, 2010

Demand-based block-level address mapping in large-scale NAND flash storage systems.
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010

2009
Loop scheduling with memory access reduction under register constraints for DSP applications.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Improving the Reliability of Embedded Systems with Cache and SPM.
Proceedings of the IEEE 6th International Conference on Mobile Adhoc and Sensor Systems, 2009


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