A Novel Mutation Based Method for Detecting FPGA Logic Synthesis Tool Bugs. - Yi Zhang 148; He Jiang 001; Xiaochen Li; Shikai Guo; Peiyu Zou; Zun Wang 005 (CoRR, 2025)

Toward Understanding FPGA Synthesis Tool Bugs. - Yi Zhang 148; He Jiang 001; Shikai Guo; Xiaochen Li; Hui Liu 003; Chongyang Shi 001 (ACM Trans. Softw. Eng. Methodol., 2025)

Insights From Bugs in FPGA High-Level Synthesis Tools: An Empirical Study of Bambu Bugs. - Zun Wang 005; He Jiang 001; Xiaochen Li; Shikai Guo; Xu Zhao; Yi Zhang 148 (IEEE Trans. Reliab., 2025)

Transformation-Recipe-Based FPGA Synthesis Compiler Testing. - Yi Zhang 148; He Jiang 001; Shikai Guo; Xiaochen Li; Zun Wang 005; Shuai Zhang; Wei Xu (IEEE Trans. Reliab., 2026)