Precision Gating: Improving Neural Network Efficiency with Dynamic Dual-Precision Activations. - Yichi Zhang 006; Ritchie Zhao; Weizhe Hua; Nayun Xu; G. Edward Suh; Zhiru Zhang (ICLR, 2020)

Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. - Shubham Rai; Walter Lau Neto; Yukio Miyasaka; Xinpei Zhang; Mingfei Yu; Qingyang Yi; Masahiro Fujita; Guilherme B. Manske; Matheus F. Pontes; Leomar S. da Rosa; Marilton S. de Aguiar; Paulo F. Butzen; et al. (DATE, 2021)

FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations. - Yichi Zhang 006; Junhao Pan; Xinheng Liu; Hongzheng Chen; Deming Chen; Zhiru Zhang (FPGA, 2021)

BulletTrain: Accelerating Robust Neural Network Training via Boundary Example Mining. - Weizhe Hua; Yichi Zhang 006; Chuan Guo 001; Zhiru Zhang; G. Edward Suh (NeurIPS, 2021)

PokeBNN: A Binary Pursuit of Lightweight Accuracy. - Yichi Zhang 006; Zhiru Zhang; Lukasz Lew (CVPR, 2022)

A 28nm 8-bit Floating-Point Tensor Core based CNN Training Processor with Dynamic Activation/Weight Sparsification. - Shreyas Kolala Venkataramanaiah; Jian Meng; Han-Sok Suh; Injune Yeo; Jyotishman Saikia; Sai Kiran Cherupally; Yichi Zhang 006; Zhiru Zhang; Jae-sun Seo (ESSCIRC, 2022)

Understanding Hyperdimensional Computing for Parallel Single-Pass Learning. - Tao Yu; Yichi Zhang 006; Zhiru Zhang; Christopher De Sa (NeurIPS, 2022)

Binarized Neural Machine Translation. - Yichi Zhang 006; Ankush Garg; Yuan Cao; Lukasz Lew; Behrooz Ghorbani; Zhiru Zhang; Orhan Firat (NeurIPS, 2023)

A 28-nm 8-bit Floating-Point Tensor Core-Based Programmable CNN Training Processor With Dynamic Structured Sparsity. - Shreyas Kolala Venkataramanaiah; Jian Meng; Han-Sok Suh; Injune Yeo; Jyotishman Saikia; Sai Kiran Cherupally; Yichi Zhang 006; Zhiru Zhang; Jae-Sun Seo (IEEE J. Solid State Circuits, 2023)

Trainable Fixed-Point Quantization for Deep Learning Acceleration on FPGAs. - Dingyi Dai; Yichi Zhang 006; Jiahao Zhang; Zhanqiu Hu; Yaohui Cai; Qi Sun; Zhiru Zhang (CoRR, 2024)