Real-Time Hough Transform on 1-D SIMD Processors: Implementation and Architecture Exploration. - Yifan He 002; Zoran Zivkovic; Richard P. Kleihorst; Alexander Danilin; Henk Corporaal; Bart Mesman (ACIVS, 2008)

Real-time implementations of Hough Transform on SIMD architecture. - Yifan He 002; Zoran Zivkovic; Richard P. Kleihorst; Alexander Danilin; Henk Corporaal (ICDSC, 2008)

Xetal-Pro: an ultra-low energy and high throughput SIMD processor. - Yifan He 002; Yu Pu; Richard P. Kleihorst; Zhenyu Ye; Anteneh A. Abbo; Sebastian M. Londono; Henk Corporaal (DAC, 2010)

Feasibility Analysis of Ultra High Frame Rate Visual Servoing on FPGA and SIMD Processor. - Yifan He 002; Zhenyu Ye; Dongrui She; Bart Mesman; Henk Corporaal (ACIVS, 2011)

Demo: An embedded vision system for high frame rate visual servoing. - Zhenyu Ye; Yifan He 002; Roel Pieters; Bart Mesman; Henk Corporaal; Pieter Jonker (ICDSC, 2011)

Bottlenecks and Tradeoffs in High Frame Rate Visual Servoing: A Case Study. - Zhenyu Ye; Yifan He 002; Roel Pieters; Bart Mesman; Henk Corporaal; Pieter Jonker (MVA, 2011)

MOVE-Pro: A low power and high code density TTA architecture. - Yifan He 002; Dongrui She; Bart Mesman; Henk Corporaal (ICSAMOS, 2011)

From Xetal-II to Xetal-Pro: On the Road Toward an Ultralow-Energy and High-Throughput SIMD Processor. - Yu Pu; Yifan He 002; Zhenyu Ye; Sebastian M. Londono; Anteneh A. Abbo; Richard P. Kleihorst; Henk Corporaal (IEEE Trans. Circuits Syst. Video Technol., 2011)

Energy efficient special instruction support in an embedded processor with compact isa. - Dongrui She; Yifan He 002; Henk Corporaal (CASES, 2012)

Scheduling for register file energy minimization in explicit datapath architectures. - Dongrui She; Yifan He 002; Bart Mesman; Henk Corporaal (DATE, 2012)

MAMPSX: A demonstration of rapid, predictable HMPSOC synthesis. - Shakith Fernando; Mark Wijtvliet; Firew Siyoum; Yifan He 002; Sander Stuijk; Akash Kumar 001; Henk Corporaal (FPL, 2013)

MAMPSx: A design framework for rapid synthesis of predictable heterogeneous MPSoCs. - Shakith Fernando; Firew Siyoum; Yifan He 002; Akash Kumar 001; Henk Corporaal (RSP, 2013)

OpenCL code generation for low energy wide SIMD architectures with explicit datapath. - Dongrui She; Yifan He 002; Luc Waeijen; Henk Corporaal (ICSAMOS, 2013)

SIMD made explicit. - Luc Waeijen; Dongrui She; Henk Corporaal; Yifan He 002 (ICSAMOS, 2013)

Efficient communication support in predictable heterogeneous MPSoC designs for streaming applications. - Yifan He 002; Dongrui She; Sander Stuijk; Henk Corporaal (J. Syst. Archit., 2013)

An energy-efficient method of supporting flexible special instructions in an embedded processor with compact ISA. - Dongrui She; Yifan He 002; Henk Corporaal (ACM Trans. Archit. Code Optim., 2013)

Reduction Operator for Wide-SIMDs Reconsidered. - Luc Waeijen; Dongrui She; Henk Corporaal; Yifan He 002 (DAC, 2014)

A Co-Design Framework with OpenCL Support for Low-Energy Wide SIMD Processor. - Dongrui She; Yifan He 002; Luc Waeijen; Henk Corporaal (J. Signal Process. Syst., 2015)

A Low-Energy Wide SIMD Architecture with Explicit Datapath. - Luc Waeijen; Dongrui She; Henk Corporaal; Yifan He 002 (J. Signal Process. Syst., 2015)

MacSim: A MAC-Enabled High-Performance Low-Power SIMD Architecture. - Tong Geng; Luc Waeijen; Maurice Peemen; Henk Corporaal; Yifan He 002 (DSD, 2016)

A configurable SIMD architecture with explicit datapath for intelligent learning. - Yifan He 002; Maurice Peemen; Luc Waeijen; Erkan Diken; Mattia Fiumara; Gerard K. Rauwerda; Henk Corporaal; Tong Geng (SAMOS, 2016)

Datawidth-Aware Energy-Efficient Multipliers: A Case for Going Sign Magnitude. - Luc Waeijen; Hailong Jiao; Henk Corporaal; Yifan He 002 (DSD, 2018)

Crosstalk-noise-aware bus coding with low-power ground-gated repeaters. - Hailong Jiao; Rui Wang; Yifan He 002 (Int. J. Circuit Theory Appl., 2018)

Automatic Memory-Efficient Scheduling of CNNs. - Luc Waeijen; Savvas Sioutas; Yifan He 002; Maurice Peemen; Henk Corporaal (SAMOS, 2019)

Efficient Zero-Activation-Skipping for On-Chip Low-Energy CNN Acceleration. - Min Liu; Yifan He 002; Hailong Jiao (AICAS, 2021)

An Energy-Efficient Low-Latency 3D-CNN Accelerator Leveraging Temporal Locality, Full Zero-Skipping, and Hierarchical Load Balance. - Changchun Zhou 001; Min Liu; Siyuan Qiu; Yifan He 002; Hailong Jiao (DAC, 2021)

A compression pipeline for one-stage object detection model. - Zhishan Li; Yiran Sun; Guanzhong Tian; Lei Xie 007; Yong Liu 007; Hongye Su; Yifan He 002 (J. Real Time Image Process., 2021)

Correction to: A compression pipeline for one-stage object detection model. - Zhishan Li; Yiran Sun; Guanzhong Tian; Lei Xie 007; Yong Liu 007; Hongye Su; Yifan He 002 (J. Real Time Image Process., 2021)

An Effective Face Anti-Spoofing Method via Stereo Matching. - Zhishan Li; Jiayan Yuan; Baozhi Jia; Yifan He 002; Lei Xie 007 (IEEE Signal Process. Lett., 2021)

An LUT-Based Multiplier Array for Systolic Array-Based Convolutional Neural Network Accelerator. - Ming Liu 022; Yifan He 002; Hailong Jiao (APCCAS, 2022)

An Efficient Framework for Detection and Recognition of Numerical Traffic Signs. - Zhishan Li; Mingmu Chen; Yifan He 002; Lei Xie 007; Hongye Su (ICASSP, 2022)

PBDE: an effective post-processing method based on box density for object detection. - Zhishan Li; Baozhi Jia; Yifan He 002; Lei Xie 007 (Appl. Intell., 2022)

STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse. - Jinshan Yue; Yongpan Liu; Zhe Yuan; Xiaoyu Feng; Yifan He 002; Wenyu Sun; Zhixiao Zhang; Xin Si; Ruhui Liu; Zi Wang; Meng-Fan Chang; Chunmeng Dou; et al. (IEEE J. Solid State Circuits, 2022)

An Energy-Efficient 3D Point Cloud Neural Network Accelerator With Efficient Filter Pruning, MLP Fusion, and Dual-Stream Sampling. - Changchun Zhou 001; Yuzhe Fu; Min Liu; Siyuan Qiu; Ge Li; Yifan He 002; Hailong Jiao (ICCAD, 2023)

A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital Architecture. - Jinshan Yue; Chaojie He; Zi Wang; Zhaori Cong; Yifan He 002; Mufeng Zhou; Wenyu Sun; Xueqing Li 002; Chunmeng Dou; Feng Zhang 014; Huazhong Yang; Yongpan Liu; et al. (ISSCC, 2023)

A 5.6-89.9TOPS/W Heterogeneous Computing-in-Memory SoC with High-Utilization Producer-Consumer Architecture and High-Frequency Read-Free CIM Macro. - Jinshan Yue; Mingtao Zhan; Zi Wang; Yifan He 002; Yaolei Li; Songming Yu; Wenyu Sun; Lu Jie 001; Chunmeng Dou; Xueqing Li 002; Nan Sun 001; Huazhong Yang; et al. (VLSI Technology and Circuits, 2023)

Sagitta: An Energy-Efficient Sparse 3D-CNN Accelerator for Real-Time 3-D Understanding. - Changchun Zhou 001; Min Liu; Siyuan Qiu; Xugang Cao; Yuzhe Fu; Yifan He 002; Hailong Jiao (IEEE Internet Things J., 2023)

CNN Accelerator at the Edge With Adaptive Zero Skipping and Sparsity-Driven Data Flow. - Ming Liu 022; Changchun Zhou 001; Siyuan Qiu; Yifan He 002; Hailong Jiao (IEEE Trans. Circuits Syst. Video Technol., 2023)

Diversity-Authenticity Co-constrained Stylization for Federated Domain Generalization in Person Re-identification. - Fengxiang Yang; Zhun Zhong; Zhiming Luo; Yifan He 002; Shaozi Li; Nicu Sebe (AAAI, 2024)

Selective Domain-Invariant Feature for Generalizable Deepfake Detection. - Yingxin Lai; Guoqing Yang; Yifan He 002; Zhiming Luo; Shaozi Li (ICASSP, 2024)

A Collaborative Framework Using Multimodal Data and Adaptive Noise for Human Behavior Anomaly Detection. - Guoqing Yang; Jianzhe Gao; Kejia Zhang 003; Yifan He 002; Zhiming Luo; Shaozi Li (IJCNN, 2024)

A Multilevel Guidance-Exploration Network and Behavior-Scene Matching Method for Human Behavior Anomaly Detection. - Guoqing Yang; Zhiming Luo; Jianzhe Gao; Yingxin Lai; Kun Yang; Yifan He 002; Shaozi Li (ACM Multimedia, 2024)

A 41.7TOPS/W@INT8 Computing-in-Memory Processor with Zig-Zag Backbone-Systolic CIM and Block/Self-Gating CAM for NN/Recommendation Applications. - Zhuoyu Dai; Shengzhe Yan; Zhaori Cong; Zeyu Guo 002; Yifan He 002; Wenyu Sun; Chunmeng Dou; Feng Zhang 014; Jinshan Yue; Yongpan Liu; Ming Liu 022 (VLSI Technology and Circuits, 2024)

An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update. - Jinshan Yue; Yongpan Liu; Xiaoyu Feng; Yifan He 002; Jingyu Wang 004; Zhe Yuan; Mingtao Zhan; Jiaxin Liu; Jian-Wei Su; Yen-Lin Chung; Ping-Chun Wu; Li-Yang Hong; et al. (IEEE J. Solid State Circuits, 2024)

Adjustable Multi-Stream Block-Wise Farthest Point Sampling Acceleration in Point Cloud Analysis. - Changchun Zhou 001; Yuzhe Fu; Yanzhe Ma; Eryi Han; Yifan He 002; Hailong Jiao (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture. - Shengzhe Yan; Jinshan Yue; Chaojie He; Zi Wang; Zhaori Cong; Yifan He 002; Mufeng Zhou; Wenyu Sun; Xueqing Li 002; Chunmeng Dou; Feng Zhang 014; Huazhong Yang; et al. (IEEE J. Solid State Circuits, 2024)

Toward Effective Traffic Sign Detection via Two-Stage Fusion Neural Networks. - Zhishan Li; Hongxu Chen; Battista Biggio; Yifan He 002; Haoran Cai; Fabio Roli; Lei Xie 007 (IEEE Trans. Intell. Transp. Syst., 2024)

SoftAct: A High-Precision Softmax Architecture for Transformers Supporting Nonlinear Functions. - Yuzhe Fu; Changchun Zhou 001; Tianling Huang; Eryi Han; Yifan He 002; Hailong Jiao (IEEE Trans. Circuits Syst. Video Technol., 2024)

23.4 Nebula: A 28nm 109.8TOPS/W 3D PNN Accelerator Featuring Adaptive Partition, Multi-Skipping, and Block-Wise Aggregation. - Changchun Zhou 001; Tianling Huang; Yanzhe Ma; Yuzhe Fu; Xiangjie Song; Siyuan Qiu; Jiacong Sun; Min Liu; Ge Li; Yifan He 002; Yuchao Yang 001; Hailong Jiao (ISSCC, 2025)

An RRAM-Based Computing-in-Memory Macro With Low-Power Readout/Hold Circuits and Activation Differential Strategy for AdderNet. - Zhihang Qian; Shengzhe Yan; Zhuoyu Dai; Zeyu Guo 002; Zhaori Cong; Yifan He 002; Chunmeng Dou; Feng Zhang 014; Jinshan Yue; Yongpan Liu (IEEE Trans. Very Large Scale Integr. Syst., 2025)