14.3 A 65nm Computing-in-Memory-Based CNN Processor with 2.9-to-35.8TOPS/W System Energy Efficiency Using Dynamic-Sparsity Performance-Scaling Architecture and Energy-Efficient Inter/Intra-Macro Data Reuse. - Jinshan Yue; Zhe Yuan; Xiaoyu Feng; Yifan He 003; Zhixiao Zhang; Xin Si; Ruhui Liu; Meng-Fan Chang; Xueqing Li 002; Huazhong Yang; Yongpan Liu (ISSCC, 2020)

Block-Circulant Neural Network Accelerator Featuring Fine-Grained Frequency-Domain Quantization and Reconfigurable FFT Modules. - Yifan He 003; Jinshan Yue; Yongpan Liu; Huazhong Yang (ASP-DAC, 2021)

A Non-Volatile Computing-In-Memory Framework With Margin Enhancement Based CSA and Offset Reduction Based ADC. - Yuxuan Huang; Yifan He 003; Jinshan Yue; Huazhong Yang; Yongpan Liu (ASP-DAC, 2021)

A 2.75-to-75.9TOPS/W Computing-in-Memory NN Processor Supporting Set-Associate Block-Wise Zero Skipping and Ping-Pong CIM with Simultaneous Computation and Weight Updating. - Jinshan Yue; Xiaoyu Feng; Yifan He 003; Yuxuan Huang; Yipeng Wang 009; Zhe Yuan; Mingtao Zhan; Jiaxin Liu; Jian-Wei Su; Yen-Lin Chung; Ping-Chun Wu; Li-Yang Hung; et al. (ISSCC, 2021)

Machine Learning for Electronic Design Automation: A Survey. - Guyue Huang; Jingbo Hu; Yifan He 003; Jialong Liu; Mingyuan Ma; Zhaoyang Shen; Juejian Wu; Yuanfan Xu; Hengrui Zhang; Kai Zhong; Xuefei Ning; Yuzhe Ma; et al. (ACM Trans. Design Autom. Electr. Syst., 2021)

Sparsity-Aware Non-Volatile Computing-In-Memory Macro with Analog Switch Array and Low-Resolution Current-Mode ADC. - Yuxuan Huang; Yifan He 003; Jinshan Yue; Wenyu Sun; Huazhong Yang; Yongpan Liu (ASP-DAC, 2022)

C-RRAM: A Fully Input Parallel Charge-Domain RRAM-based Computing-in-Memory Design with High Tolerance for RRAM Variations. - Yifan He 003; Yuxuan Huang; Jinshan Yue; Wenyu Sun; Lu Zhang; Yongpan Liu (ISCAS, 2022)

Mixed-Precision Continual Learning Based on Computational Resistance Random Access Memory. - Yi Li 049; Woyu Zhang; Xiaoxin Xu; Yifan He 003; Danian Dong; Nanjia Jiang; Fei Wang; Zeyu Guo 002; Shaocong Wang; Chunmeng Dou; Yongpan Liu; Zhongrui Wang; et al. (Adv. Intell. Syst., 2022)

Accuracy Optimization With the Framework of Non-Volatile Computing-In-Memory Systems. - Yuxuan Huang; Yifan He 003; Jinshan Yue; Huazhong Yang; Yongpan Liu (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Bit-Aware Fault-Tolerant Hybrid Retraining and Remapping Schemes for RRAM-Based Computing-in-Memory Systems. - Yuxuan Huang; Yifan He 003; Jingyu Wang 004; Jinshan Yue; Lu Zhang; Kaiwei Zou; Huazhong Yang; Yongpan Liu (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A User-Friendly Fast and Accurate Simulation Framework for Non-Ideal Factors in Computing-in-Memory Architecture. - Zi Wang; Jinshan Yue; Chaojie He; Zhuoyu Dai; Feibin Xiang; Zhaori Cong; Yifan He 003; Xiaoyu Feng; Yongpan Liu (ISCAS, 2023)

A 28nm 38-to-102-TOPS/W 8b Multiply-Less Approximate Digital SRAM Compute-In-Memory Macro for Neural-Network Inference. - Yifan He 003; Haikang Diao; Chen Tang; Wenbin Jia; Xiyuan Tang; Yuan Wang 001; Jinshan Yue; Xueqing Li 002; Huazhong Yang; Hongyang Jia; Yongpan Liu (ISSCC, 2023)

An RRAM-Based Digital Computing-in-Memory Macro With Dynamic Voltage Sense Amplifier and Sparse-Aware Approximate Adder Tree. - Yifan He 003; Jinshan Yue; Xiaoyu Feng; Yuxuan Huang; Hongyang Jia; Jingyu Wang 004; Lu Zhang; Wenyu Sun; Huazhong Yang; Yongpan Liu (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A Weight-Reload-Eliminated Compute-in-Memory Accelerator for 60 fps 4K Super-Resolution. - Yaolei Li; Jinshan Yue; Jingyu Wang 004; Chen Tang; Yifan He 003; Wenbin Jia; Kaiwei Zou; Lu Zhang; Huazhong Yang; Yongpan Liu (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Pareto Frequency-Aware Power Side-Channel Countermeasure Exploration on CNN Systolic Array. - Lu Zhang; Dejun Mu; Yuxuan Huang; Jingyu Wang 004; Yifan He 003; Yaolei Li; Lizhou Liu; Kaiwei Zou; Huazhong Yang; Yongpan Liu (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A Heterogeneous Microprocessor Based on All-Digital Compute-in-Memory for End-to-End AIoT Inference. - Songming Yu; Yifan He 003; Hongyang Jia; Wenyu Sun; Mufeng Zhou; Luchang Lei; Wentao Zhao; Guofu Ma; Huazhong Yang; Yongpan Liu (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A Unified Microrobotic Visual-Perception Processor with 62.2-FPS/mm2 and 103-uJ/frame Navigation in 28nm. - Shuyuan Zhang; Yujin Wang; Yifan He 003; Yuchen Su; Huazhong Yang; Yongpan Liu; Hongyang Jia (A-SSCC, 2024)

34.7 A 28nm 2.4Mb/mm2 6.9 - 16.3TOPS/mm2 eDRAM-LUT-Based Digital-Computing-in-Memory Macro with In-Memory Encoding and Refreshing. - Yifan He 003; Shupei Fan; Xuan Li; Luchang Lei; Wenbin Jia; Chen Tang; Yaolei Li; Zongle Huang; Zhike Du; Jinshan Yue; Xueqing Li 002; Huazhong Yang; et al. (ISSCC, 2024)

LSAC: A Low-Power Adder Tree for Digital Computing-in-Memory by Sparsity and Approximate Circuits Co-Design. - Chaojie He; Zi Wang; Feibin Xiang; Zhuoyu Dai; Yifan He 003; Jinshan Yue; Yongpan Liu (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

RE-Specter: Examining the Architectural Features of Configurable CNN With Power Side-Channel. - Lu Zhang; Dejun Mu; Jingyu Wang 004; Ruoyang Liu; Yifan He 003; Yaolei Li; Yu Tai; Shengbing Zhang; Xiaoya Fan; Huazhong Yang; Yongpan Liu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

A Heterogeneous Microprocessor for Intermittent AI Inference Using Nonvolatile-SRAM-Based Compute-In-Memory. - Tongda Wu; Luchang Lei; Yifan He 003; Wenbin Jia; Songming Yu; Yuxuan Huang; Hongyang Jia; Huazhong Yang; Yongpan Liu (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A Multichiplet Computing-in-Memory Architecture Exploration Framework Based on Various CIM Devices. - Zhuoyu Dai; Feibin Xiang; Xiangqu Fu; Yifan He 003; Wenyu Sun; Yongpan Liu; Guanhua Yang; Feng Zhang 014; Jinshan Yue; Ling Li 013 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Pro-Cache-CIM: A 28nm 69.4TOPS/W Product-Cache-based Digital-Compute-in-Memory Macro Leveraging Data Locality Pattern in Vision AI Tasks. - Wenbin Jia; Yifan He 003; Xiang Li; Yixuan Xie; Zongle Huang; Wenxun Wang; Boju Chen; Yaolei Li; Jinshan Yue; Xueqing Li 002; Huazhong Yang; Hongyang Jia; et al. (CICC, 2025)

A Multiply-Less Approximate SRAM Compute-In-Memory Macro for Neural-Network Inference. - Haikang Diao; Yifan He 003; Xuan Li; Chen Tang; Wenbin Jia; Jinshan Yue; Haoyang Luo; Jiahao Song; Xueqing Li 002; Huazhong Yang; Hongyang Jia; Yongpan Liu; et al. (IEEE J. Solid State Circuits, 2025)

Enabling Energy-Efficient Homomorphic Encryption Evaluation via eDRAM-Based In-Situ Computing in an Edge Processor. - Luchang Lei; Yongqing Zhu; Xinhang Zou; Zhou Zhang 016; Zian Zhao; Yifan He 003; Gangfeng Du; Zhenyu Guan; Huazhong Yang; Yongpan Liu; Song Bian 001; Hongyang Jia (IEEE J. Solid State Circuits, 2025)