LETA: A lightweight exchangeable-track accelerator for efficientnet based on FPGA. - Jingbo Gao; Yu Qian; Yihan Hu 003; Xitian Fan; Wai-Shing Luk; Wei Cao 002; Lingli Wang (FPT, 2021)

AUGER: A Multi-Objective Design Space Exploration Framework for CGRAs. - Jingyuan Li 003; Yihan Hu 003; Yuan Dai; Huizhen Kuang; Lingli Wang (ICFPT, 2023)

An Agile Deploying Approach for Large-Scale Workloads on CGRA-CPU Architecture. - Jiahang Lou; Xuchen Gao; Yiqing Mao; Yunhui Qiu; Yihan Hu 003; Wenbo Yin; Lingli Wang (DATE, 2024)

TransMap: An Efficient CGRA Mapping Framework via Transformer and Deep Reinforcement Learning. - Jingyuan Li 003; Yuan Dai; Yihan Hu 003; Jiangnan Li; Wenbo Yin; Jun Tao 001; Lingli Wang (IPDPS (Workshops), 2024)

HETA: A Heterogeneous Temporal CGRA Modeling and Design Space Exploration via Bayesian Optimization. - Yuan Dai; Jingyuan Li 003; Qilong Zhu; Yunhui Qiu; Yihan Hu 003; Wenbo Yin; Lingli Wang (IEEE Trans. Very Large Scale Integr. Syst., 2024)