RO PUF design in FPGAs with new comparison strategies. - Weiqiang Liu 001; Yifei Yu; Chenghua Wang; Yijun Cui; Máire O'Neill (ISCAS, 2015)

Improving RO PUF design using frequency distribution characteristics. - Yifei Yu; Chenghua Wang; Weiqiang Liu 001; Yijun Cui; Máire O'Neill (IEICE Electron. Express, 2015)

Live demonstration: An automatic evaluation platform for physical unclonable function test. - Yijun Cui; Chenghua Wang; Weiqiang Liu 001; Máire O'Neill (ISCAS, 2016)

Low-cost configurable ring oscillator PUF with improved uniqueness. - Yijun Cui; Chenghua Wang; Weiqiang Liu 001; Yifei Yu; Máire O'Neill; Fabrizio Lombardi (ISCAS, 2016)

A Reconfigurable Memory PUF Based on Tristate Inverter Arrays. - Yijun Cui; Chenghua Wang; Weiqiang Liu 001; Máire O'Neill (SiPS, 2016)

Novel lightweight FF-APUF design for FPGA. - Chongyan Gu; Yijun Cui; Neil Hanley; Máire O'Neill (SoCC, 2016)

Modelling Attack Analysis of Configurable Ring Oscillator (CRO) PUF Designs. - Jack Miskelly; Chongyan Gu; Qingqing Ma; Yijun Cui; Weiqiang Liu 001; Máire O'Neill (DSP, 2018)

Ultra-Lightweight and Reconfigurable Tristate Inverter Based Physical Unclonable Function Design. - Yijun Cui; Chongyan Gu; Chenghua Wang; Máire O'Neill; Weiqiang Liu 001 (IEEE Access, 2018)

Theoretical Analysis of Delay-Based PUFs and Design Strategies for Improvement. - Yale Wang; Chenghua Wang; Chongyan Gu; Yijun Cui; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2019)

Multi-Incentive Delay-Based (MID) PUF. - Zhengran Zhang; Chongyan Gu; Yijun Cui; Chuan Zhang 001; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2019)

Dynamic Reconfigurable PUFs Based on FPGA. - Yijun Cui; Chenghua Wang; Yunpeng Chen; Ziwei Wei; Mengxian Chen; Weiqiang Liu 001 (SiPS, 2019)

Theoretical Analysis of Configurable RO PUFs and Strategies to Enhance Security. - Jiang Li 012; Hao Gao; Yijun Cui; Chenghua Wang; Yale Wang; Chongyan Gu; Weiqiang Liu 001 (SiPS, 2019)

Programmable Ring Oscillator PUF Based on Switch Matrix. - Yijun Cui; Yunpeng Chen; Chenghua Wang; Chongyan Gu; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2020)

Transformer PUF : A Highly Flexible Configurable RO PUF Based on FPGA. - Ziwei Wei; Yijun Cui; Yunpeng Chen; Chenghua Wang; Chongyan Gu; Weiqiang Liu 001 (SiPS, 2020)

A Dynamic Highly Reliable SRAM-Based PUF Retaining Memory Function. - Hu Zhang; Chenghua Wang; Chenggang Yan 002; Yijun Cui; Chongyan Gu; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2021)

Dynamically Configurable Physical Unclonable Function based on RRAM Crossbar. - Jiang Li 012; Yijun Cui; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (NANOARCH, 2021)

A lightweight key renewal scheme based authentication protocol with configurable RO PUF for clustered sensor networks. - Yijun Cui; Jiang Li 012; Chenghua Wang; Chongyan Gu; Weiqiang Liu 001 (Microelectron. J., 2021)

PUF-Based Mutual-Authenticated Key Distribution for Dynamic Sensor Networks. - Yanan Liu; Yijun Cui; Lein Harn; Zheng Zhang; Hao Yan; Yuan Cheng; Shuo Qiu (Secur. Commun. Networks, 2021)

A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation. - Chongyan Gu; Weiqiang Liu 001; Yijun Cui; Neil Hanley; Máire O'Neill; Fabrizio Lombardi (IEEE Trans. Emerg. Top. Comput., 2021)

Lightweight and Efficient Hardware Implementation for Saber Using NTT Multiplication. - Tianyu Xu; Yijun Cui; Dongsheng Liu; Chenghua Wang; Weiqiang Liu 001 (APCCAS, 2022)

Horizontal Correlation Analysis without Precise Location on Schoolbook Polynomial Multiplication of Lattice-based Cryptosystem. - Chuanchao Lu; Yijun Cui; Yang Li; Dur-e-Shahwar Kundi; Chenghua Wang; Weiqiang Liu 001 (ISCAS, 2022)

A Lightweight and Efficient Schoolbook Polynomial Multiplier for Saber. - Yuantuo Zhang; Yijun Cui; Ziying Ni; Dur-e-Shahwar Kundi; Dongsheng Liu; Weiqiang Liu 001 (ISCAS, 2022)

A Novel Combined Correlation Power Analysis (CPA) Attack on Schoolbook Polynomial Multiplication in Lattice-based Cryptosystems. - Chuanchao Lu; Yijun Cui; Ayesha Khalid; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (SOCC, 2022)

Simulation and Field Trial Results of Reconfigurable Intelligent Surfaces in 5G Networks. - Ruiqi Liu; Jianwu Dou; Ping Li; Jianjun Wu; Yijun Cui (IEEE Access, 2022)

A Dynamically Configurable PUF and Dynamic Matching Authentication Protocol. - Yale Wang; Chenghua Wang; Chongyan Gu; Yijun Cui; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Emerg. Top. Comput., 2022)

A Generic Dynamic Responding Mechanism and Secure Authentication Protocol for Strong PUFs. - Yale Wang; Chenghua Wang; Chongyan Gu; Yijun Cui; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2022)

An Efficient Hardware Accelerator of High-Speed NTT for CRYSTALS-Kyber Post-Quantum Cryptography. - Zhuoyao Zhang; Yijun Cui; Ziying Ni; Chenghua Wang; Weiqiang Liu 001 (ACSSC, 2023)

Novel Intrinsic Physical Unclonable Function Design for Post-quantum Cryptography. - Baosheng Wang; Yijun Cui; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (ISCAS, 2023)

An RRAM-based PUF with Adjustable Programmable Voltage and Multi-Mode Operation. - Yijun Cui; Jiang Li 012; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (NANOARCH, 2023)

Dynamic self-test scheme and authentication protocol for improving robustness of strong PUF. - Yan Li; Weifeng Yang; Jiang Li 012; Yanfang Yuan; Hu Zhang; Fengdi Wang; Yijun Cui (Microelectron. J., 2023)

High-Throughput Polynomial Multiplier for Accelerating Saber on FPGA. - Yijun Cui; Yuantuo Zhang; Ziying Ni; Shichao Yu; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

How Practical Phase-Shift Errors Affect Beamforming of Reconfigurable Intelligent Surface? - Jun Yang 058; Yijian Chen; Yijun Cui; Qingqing Wu 001; Jianwu Dou; Yuxin Wang (IEEE Trans. Commun., 2023)

High Reliable Processor-Based PUF on Voltage Over-Scaling Technique. - Xinyuan Zhao; Yijun Cui; Fei Lyu 006; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (AsianHOST, 2024)

A Concealable RRAM Physical Unclonable Function Compatible with In-Memory Computing. - Jiang Li 012; Yijun Cui; Chenghua Wang; Weiqiang Liu 001; Shahar Kvatinsky (DATE, 2024)

A Novel Methodology for Processor based PUF in Approximate Computing. - Aditya Japa; Jack Miskelly; Yijun Cui; Máire O'Neill; Chongyan Gu (ISCAS, 2024)

GATrojan: An Efficient Gate-level Hardware Trojan Detection Approach Using Graph Attention Networks. - Sen Wang; Yijun Cui; Shichao Yu; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (SOCC, 2024)

Lattice-based Multi-Stage Secret Sharing 3D Secure Encryption Scheme. - Xu Li; Yinghao Wu; Yang Liu; Baosheng Wang; Bei Wang; Yijun Cui (TrustCom, 2024)

An Efficient Ring Oscillator PUF Using Programmable Delay Units on FPGA. - Yijun Cui; Jiang Li 012; Yunpeng Chen; Chenghua Wang; Chongyan Gu; Máire O'Neill; Weiqiang Liu 001 (ACM Trans. Design Autom. Electr. Syst., 2024)

Exploring Teaching Methods for Courses on Radiation Hardening Technology in ICs. - You Wang 002; Erya Deng; Yu Gong; Zhongkun Shen; Chenghua Wang; Yijun Cui; Weiqiang Liu 001 (ISCAS, 2025)

An Efficient Hardware Implementation of Improved Plantard Mod-Multiplication for Lattice-Based Cryptography. - Mengxue Li; Jiansheng Chen; Bei Wang; Fei Lyv; Weiqiang Liu 001; Yijun Cui (ISCAS, 2025)

Ultra-compact and Side-channel Resistant Design of FIFO-based NTT Core for PQCs. - Jiatong Tian; Yijun Cui; Ziying Ni; Bei Wang; Fei Lyv; Chenghua Wang; Weiqiang Liu 001 (ISCAS, 2025)

A Lightweight and Efficient BRAM-free NTT Unit for Crystals-Dilithium. - Junjie Zhong; Bei Wang; Zeren Zhu; Weiqiang Liu 001; Yijun Cui (ISCAS, 2025)

HRaccoon: A High-performance Configurable SCA Resilient Raccoon Hardware Accelerator. - Ziying Ni; Ayesha Khalid; Zhaoyu Zhang; Yijun Cui; Weiqiang Liu 001; Máire O'Neill (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2025)

A 0.09-pJ/Bit Logic-Compatible Multiple-Time Programmable (MTP) Memory-Based PUF Design for IoT Applications. - Shuming Guo; Yinyin Lin; Hao Wang; Yao Li 018; Chongyan Gu; Weiqiang Liu 001; Yijun Cui (IEEE Trans. Very Large Scale Integr. Syst., 2025)

Instruction-Based High-Performance Hardware Controller of CRYSTALS-Kyber With Balanced Resource Utilization. - Yijun Cui; Jiansheng Chen; Ziying Ni; Zhuoyao Zhang; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

Experimental Performances of mmWave RIS-assisted 5G-Advanced Wireless Deployments in Urban Environments. - Ahmet Faruk Coskun; Alper Tolga Kocaoglu; Emre Arslan; Zehra Yigit; Samed Kesir; Batuhan Kaplan; Jianwu Dou; Yijun Cui (CoRR, 2025)

A 0.071pJ/Bit Flexible Multi-Mode Logic-Compatible Multiple-Time Programmable (MTP) Memory-Based PUF. - Yao Li 018; Yijun Cui; Shuming Guo; Jiang Li 012; Ruilin Zhang; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2025)

A Highly Reliable Dual-Mode RRAM PUF With Key Concealment Scheme. - Jiang Li 012; Yijun Cui; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001; Shahar Kvatinsky (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

High-Performance Hardware Implementation of Crystals-Dilithium Based on Improved MDC-NTT. - Yijun Cui; Junjie Zhong; Bei Wang; Tianyu Xu; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Computers, 2025)