An overview on computer-aided analysis techniques for sigma-delta modulators. - Yikui Dong; Ajoy Opal (ISCAS (5), 2001)

Integrated Linear AC-coupling Circuit for DC-Balanced and Non-Balanced Traffics. - Yikui Dong; Cathy Liu 001; Freeman Zhong (ISCAS, 2007)

AC-coupling strategy for high-speed transceivers of 10Gbps and beyond. - Yikui Dong; Steve Howard; Freeman Zhong; Scott Lowrie; Ken Paradis; Jan Kolnik; Jeff Burleson (VLSI-SoC, 2007)

A 1.0625-to-14.025Gb/s multimedia transceiver with full-rate source-series-terminated transmit driver and floating-tap decision-feedback equalizer in 40nm CMOS. - Shaolei Quan; Freeman Zhong; Wing Liu; Pervez M. Aziz; Tai Jing; Jen Dong; Chintan Desai; Hairong Gao; Monica Garcia; Gary Hom; Tony Huynh; Hiroshi Kimura; et al. (ISSCC, 2011)

A 1.0625 14.025 Gb/s Multi-Media Transceiver With Full-Rate Source-Series-Terminated Transmit Driver and Floating-Tap Decision-Feedback Equalizer in 40 nm CMOS. - Freeman Zhong; Shaolei Quan; Wing Liu; Pervez M. Aziz; Tai Jing; Jen Dong; Chintan Desai; Hairong Gao; Monica Garcia; Gary Hom; Tony Huynh; Hiroshi Kimura; et al. (IEEE J. Solid State Circuits, 2011)

A self-calibrating multi-VCO PLL scheme with leakage and capacitive modulation mitigations. - Yikui Jen Dong; Freeman Zhong (ISCAS, 2013)

A 4.6pJ/b 64Gb/s Transceiver Enabling PCIe 6.0 and CXL 3.0 in Intel 3 CMOS Technology. - Dong-Myung Choi; Yikui Dong; Roan Nicholson; Frank Liu 008; Wenyan Jia; Vadim Levin; Mike He; Sameer Pradhan; Jieqiong Du; Michael De Vita; Amanda Tran; Reza Navid; et al. (VLSI Technology and Circuits, 2024)