An Ultra-Efficient Memristor-Based DNN Framework with Structured Weight Pruning and Quantization Using ADMM. - Geng Yuan; Xiaolong Ma; Caiwen Ding; Sheng Lin 001; Tianyun Zhang; Zeinab S. Jalali; Yilong Zhao 004; Li Jiang 002; Sucheta Soundarajan; Yanzhi Wang 001 (ISLPED, 2019)

PIM-Prune: Fine-Grain DCNN Pruning for Crossbar-Based Process-In-Memory Architecture. - Chaoqun Chu; Yanzhi Wang 001; Yilong Zhao 004; Xiaolong Ma; Shaokai Ye; Yunyan Hong; Xiaoyao Liang; Yinhe Han 001; Li Jiang 002 (DAC, 2020)

ESNreram: An Energy-Efficient Sparse Neural Network Based on Resistive Random-Access Memory. - Zhuoran Song; Yilong Zhao 004; Yanan Sun 003; Xiaoyao Liang; Li Jiang 002 (ACM Great Lakes Symposium on VLSI, 2020)

PIMGCN: A ReRAM-Based PIM Design for Graph Convolutional Network Acceleration. - Tao Yang 031; Dongyue Li; Yibo Han; Yilong Zhao 004; Fangxin Liu; Xiaoyao Liang; Zhezhi He; Li Jiang 002 (DAC, 2021)

Digital Offset for RRAM-based Neuromorphic Computing: A Novel Solution to Conquer Cycle-to-cycle Variation. - Ziqi Meng; Weikang Qian; Yilong Zhao 004; Yanan Sun 003; Rui Yang; Li Jiang 002 (DATE, 2021)

Re2PIM: A Reconfigurable ReRAM-Based PIM Design for Variable-Sized Vector-Matrix Multiplication. - Yilong Zhao 004; Zhezhi He; Naifeng Jing; Xiaoyao Liang; Li Jiang 002 (ACM Great Lakes Symposium on VLSI, 2021)

Bit-Transformer: Transforming Bit-level Sparsity into Higher Preformance in ReRAM-based Accelerator. - Fangxin Liu; Wenbo Zhao 005; Zhezhi He; Zongwu Wang; Yilong Zhao 004; Yongbiao Chen; Li Jiang 002 (ICCAD, 2021)

SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network. - Fangxin Liu; Wenbo Zhao 005; Zhezhi He; Zongwu Wang; Yilong Zhao 004; Tao Yang 031; Jingnai Feng; Xiaoyao Liang; Li Jiang 002 (ICCD, 2021)

SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network. - Fangxin Liu; Wenbo Zhao 005; Yilong Zhao 004; Zongwu Wang; Tao Yang 031; Zhezhi He; Naifeng Jing; Xiaoyao Liang; Li Jiang 002 (CoRR, 2021)

Unary Coding and Variation-Aware Optimal Mapping Scheme for Reliable ReRAM-Based Neuromorphic Computing. - Yanan Sun 003; Chang Ma; Zhi Li 058; Yilong Zhao 004; Jiachen Jiang; Weikang Qian; Rui Yang; Zhezhi He; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

DTQAtten: Leveraging Dynamic Token-based Quantization for Efficient Attention Architecture. - Tao Yang 031; Dongyue Li; Zhuoran Song; Yilong Zhao 004; Fangxin Liu; Zongwu Wang; Zhezhi He; Li Jiang 002 (DATE, 2022)

RePAST: A ReRAM-based PIM Accelerator for Second-order Training of DNN. - Yilong Zhao 004; Li Jiang 002; Mingyu Gao 001; Naifeng Jing; Chengyang Gu; Qidong Tang; Fangxin Liu; Tao Yang 031; Xiaoyao Liang (CoRR, 2022)

Neural-PIM: Efficient Processing-In-Memory With Neural Approximation of Peripherals. - Weidong Cao 001; Yilong Zhao 004; Adith Boloor; Yinhe Han 001; Xuan Zhang 001; Li Jiang 002 (IEEE Trans. Computers, 2022)

IVQ: In-Memory Acceleration of DNN Inference Exploiting Varied Quantization. - Fangxin Liu; Wenbo Zhao 005; Zongwu Wang; Yilong Zhao 004; Tao Yang 031; Yiran Chen 001; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

PIMPR: PIM-based Personalized Recommendation with Heterogeneous Memory Hierarchy. - Tao Yang 031; Hui Ma; Yilong Zhao 004; Fangxin Liu; Zhezhi He; Xiaoli Sun; Li Jiang 002 (DATE, 2023)

PASGCN: An ReRAM-Based PIM Design for GCN With Adaptively Sparsified Graphs. - Tao Yang 031; Dongyue Li; Fei Ma; Zhuoran Song; Yilong Zhao 004; Jiaxi Zhang 001; Fangxin Liu; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

DTATrans: Leveraging Dynamic Token-Based Quantization With Accuracy Compensation Mechanism for Efficient Transformer Architecture. - Tao Yang 031; Fei Ma; Xiaoling Li; Fangxin Liu; Yilong Zhao 004; Zhezhi He; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

UM-PIM: DRAM-based PIM with Uniform & Shared Memory Space. - Yilong Zhao 004; Mingyu Gao 001; Fangxin Liu; Yiwei Hu; Zongwu Wang; Han Lin; Jin Li 002; He Xian; Hanlin Dong; Tao Yang 031; Naifeng Jing; Xiaoyao Liang; et al. (ISCA, 2024)

STAMP: Accelerating Second-Order DNN Training Via ReRAM-Based Processing-in-Memory Architecture. - Yilong Zhao 004; Fangxin Liu; Mingyu Gao 001; Xiaoyao Liang; Qidong Tang; Chengyang Gu; Tao Yang 031; Naifeng Jing; Li Jiang 002 (APPT, 2025)

PUSHtap: PIM-based In-Memory HTAP with Unified Data Storage Format. - Yilong Zhao 004; Mingyu Gao 001; Huanchen Zhang; Fangxin Liu; Gongye Chen; He Xian; Haibing Guan; Li Jiang 001 (ASPLOS (3), 2025)

PLAIN: Leveraging High Internal Bandwidth in PIM for Accelerating Large Language Model Inference via Mixed-Precision Quantization. - Yiwei Hu; Fangxin Liu; Zongwu Wang; Yilong Zhao 004; Tao Yang 031; Li Jiang 002; Haibing Guan (ICCAD, 2025)

PUSHtap: PIM-based In-Memory HTAP with Unified Data Storage Format. - Yilong Zhao 004; Mingyu Gao 001; Huanchen Zhang; Fangxin Liu; Gongye Chen; He Xian; Haibing Guan; Li Jiang 002 (CoRR, 2025)

BLADE: Boosting LLM Decoding's Communication Efficiency in DRAM-based PIM. - Yilong Zhao 004; Fangxin Liu; Zongwu Wang; Mingjian Li; Mingxing Zhang; Chixiao Chen; Li Jiang 002 (ASP-DAC, 2026)